Reset sequence interpretation, crystals

Thread Starter


Joined May 18, 2007
Hey all,

I'm having trouble interpreting what the following means (this is from the at89c51snd1c datasheet, from Atmel).

Cold Reset
2 conditions are required before enabling a CPU start-up:
• VDD must reach the specified VDD range
• The level on X1 [xtal in] input pin must be outside the specification (VIH, VIL)

If one of these 2 conditions are not met, the microcontroller does not start correctly and can execute an instruction fetch from anywhere in the program space. An active level applied on the RST pin must be maintained till both of the above conditions are met.
What does that even mean? Higher than the highest allowed and lower than the lowest allowed?

Thanks in advance.


Joined Jan 28, 2005
I think what it is trying to say is that the amplitude of the signal on xtal-in must be great enough such that its positive most excursion is greater than VIH and that its negative most excursion is less than VIL.



Joined Feb 24, 2006
If you look at the startup of a crystal oscillator you will see it go from a steady value of Vdd/2 to small oscillations which increase in magnitude until they are outside the specified range.

The interpretation is that Vdd is above a certain value and the oscillator is running.

Things to watch out for are a slowly rising Vdd, and to much or too little load capacitance on the crystal.