Derive a sequential circuit with two inputs (S1 and S2) and one output (z) using D flip flops that will output z=1 if a S1=S2=0 is input, then a S1=S2=1 is input, then a S1=S2=0 is input. Any other sequences of these inputs should output a z = 0. Overlapping sequences should also be detected (ie 00->11->00->11->00 should output 0 0 0 1 0 1). Use a Moore model, and show all of your work including the state machine, state table, state assignment, state assignment table, and the final circuit.

 

So.... what's your question?

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What efforts have you made so far?

 

There problem seems rather straight-forward, so the confusion seems to be in your understanding of the problem. So what do you understand and what don't you understand?

 

We aren't going to simply hand over the answer, but we will help you through the problem. In order to do this, however, we need to know what you do and do not understand about the problem. Please post your work and approach so we can know where you need help.

You may want to look at the eBook article on Finite State Machines (FSMs). The methods presented are of the Moore type.