The attached file contains a diagram of a transistor push-pull pair I found on this site (the only modification to the diagram being the inclusion of the AC input signal). From what I know about class B operation and push-pull pairs, the transistors must operate in active mode alternately for only half a cycle. From my analysis - I stand to be corrected - of the diagram, both Q1 and Q2 are active in the 1st half- cycle since both B1/E1 and B2/E2 junctions are forward biased (assuming the AC signal is +ve with respect to B1 for 1st half-cycle). In the 2nd half-cycle both junctions are reverse-biased and therefore are in cut-off mode. Where am I going wrong in my interpretation of the diagram?
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