Hello!
I have recently been playing around with a LM723 voltage regulator as well as trying to learn how op-amps work. So while reading the LM723 data sheet i noted that the current limit sense pins are the base and emitter of a transistor, which pulls the output transistor low when the voltage across them reaches about 0.65 volts. This voltage would normally be sensed directly across the current limit resistor, which would for instance limit the output current to 650mA when using a 1 ohm sense resistor.

So i got this idea i wanted to try, to measure the voltage drop across a resistor with a differential amplifier and feed the output into the current limit pin of the LM723. I taught if this would work, i could vary the gain of the amplifier (or some configuration of the amplifier) and by doing so adjust the output current. For instance with a gain of 10, the current limit would kick in at 65mA instead of 650mA.

I have played around with this on the breadboard and it sort of works (currently only using a gain of 1), the output of the op-amp corresponds with the voltage drop across the 1 ohm resistor and the current limit kicks in, but the output oscillates like crazy.

Attached is the schematic of my experiment and a screen capture from the scope. The blue trace is the output of the op-amp, and the yellow trace is the output of the LM723 regulator.
My question is, what (if anything) could be done to improve this circuit and smooth out the output voltage? Better op-amp, filtering of some sort? I can't quite get my head around why this circuit behaves this way so any input would be appreciated.

best regards
MaggoT

 

If you disconnect the CS & CL inputs are the oscillations still present?

 

What do you have the op amp power supply pins connected to?

 

1 MOhm seems too much for those resistors I think. Something smaller maybe?

 

Try this configuration instead http://www.allaboutcircuits.com/vol_3/chpt_8/10.html
Use resistors in the range 10 to 100 Kohm. I did the same as you in my younger days using a LM324. It worked quite well as I remember. Until I had LM723 in dip package that exploded due to some short. A fragment nearly hit my eye

 

When i disconnect the CL and CS inputs it does not oscillate, but it only starts oscillating when it goes into current limit mode and with the pins disconnected that of never happens. Also when i run it in "normal" operation with CL/CS connected directly across the 1ohm resistor without the op-amp it does not oscillate.

The op-amp's power pins are connected to +15v and GND from my lab power supply, just as the LM723 (the +30v is wrong in the schematic, sorry). The op-amp as well as VC and V+ on the LM723 all have their own 100nF decoupling caps.

I will try some lower resistor values for the opamp, as well as that instrumentation amplifier circuit, thanks! I tried the LM324 first but that oscillated even worse than the TLC2272 i'm currently testing. If i can get this stable i will give it another go with the LM324.

 

No stay with your TLC2272. I used the LM324 because this was the best option 20 years ago. That I could get hold on. Then thinking about it. I think the oscillation is natural to see also. Then the current limiting kicks in the output voltage will drop. Then the output voltage drops to point there the current limiting transistor is put back if "off" state. It will be no more current limiting. And the output voltage from the LM723 will again rise to level that causes current limiting to kick in. The cycle in and of current limiting. Will not be digital but more a sliding motion in and out. Hence the pattern you see on your scope

 

Ok i have done some more testing. First off the TLC2272 with 100K or 10K resistors seems to actually work pretty well. No oscillation whatsoever, until i touch the wire going to the non-inverting input with my finger, then it goes right into the same type of oscillation as above and stays there as long as i hold the wire. When i let it go, it immediately settles back down to a straight line This is of course a noisy breadboard wire-up so this would probably work on a proper PCB, but is there a way to make it more immune to noise?

I did a quick test with the LM324 as well, with 1M and 100K resistors it oscillates every time the current limit kicks in, and when i wind the output voltage pot down to minimum it doesn't "snap out" of the oscillation, so i have to kill the power and reset it. With 10K resistors it seems to work, but the output of the op-amp never goes below 0.5 volts for some reason...

I'm still gonna try the instrumentation amplifier configuration with the TLC2272 and see how that works in this case.

t06afre> That does make sense.

 

Small caps across R17 and R19 will lower the high frequency gain and should reduce the tendency of the circuit to oscillate. You can experiment with different values to see which value is best.

 

The way you have your diff amp connected picks the voltage between the output and common--not across the shunt.

I have used this technique--check thumbnail.

One problem with op amps is that many are intended to function with the input common mode voltage going to the negative rail (common), but not the positive rail as in positive rail shunt amplifiers. A few types have the common mode voltage range extending to the positive rail--one that I have used is the LF442. I think that the TL082 (more common device) also does this, but have not tried it.

Having a problem posting attachments--anyone know what may be going on--the 'Manage Files' link does not show

 

The way you have your diff amp connected picks the voltage between the output and common--not across the shunt.

...............

Not so. Take another look. The op amp is configured as a differential circuit which measures the voltage across the shunt resistor.

 

@crutschow
Not the way I see it--if what you say is true, the diff amp is referencing the output signal to common--something that the current limit section of the IC is not designed for

 

I see that the current sense terminal is connected to common--while this tends to work in the correct polarity, it adds way too much voltage gain for the circuit to work without oscillation.

 

@crutschow
Not the way I see it--if what you say is true, the diff amp is referencing the output signal to common--something that the current limit section of the IC is not designed for

Please read how a differential op amp amplifier circuit works. You seem unclear on its operation.

 

I see that the current sense terminal is connected to common--while this tends to work in the correct polarity, it adds way too much voltage gain for the circuit to work without oscillation.

No, the gain between the sense resistor and the base-emitter of the current limiting transistor is unity in either case.
The potential problem that jumps out at me is that the op amp adds another pole in the current limiting loop (the other one is from the compensation cap).
Speaking of compensation, why is there a 100nF cap from the -input to ground? This will reduce stability and make settling time to transient loads slower.
I have been running a simulation. In my sim, if I get rid of the 100nF cap and add two 10pF caps - one across the op amp's feedback resistor (all 4 resistors are 100k), and the other from the +input to ground, the circuit becomes stable, even when switching in and out of current limiting. I guess this pushes the predominant pole low enough to maintain adequate phase margin.
BTW, in the schematic, the 1f capacitor is 1 femptofarad - basically zero.

EDIT:
The 1Meg from base to gnd is there so I could easily open the current limit feedback loop by removing the connection between the op amp and the base., leaving the transistor OFF.

 

@RON H
I think you have a handle on it, fixing it in simulation.
Good observations.

However, my point is that in the basic app note circuit, the emitter of the current limit transistor rides on the positive output terminal--my crainial simulator cannot seem to determine if this is a common base or common emitter configuration as I can see it either way--if common base, it has low gain--if common emitter, high gain--and unlike the posted circuit, Vce varies little as it starves the base drive of the series pass transistor, thus making it all the more confusing.

Any thought on this detail.

 

@RON H
I think you have a handle on it, fixing it in simulation.
Good observations.

However, my point is that in the basic app note circuit, the emitter of the current limit transistor rides on the positive output terminal--my crainial simulator cannot seem to determine if this is a common base or common emitter configuration as I can see it either way--if common base, it has low gain--if common emitter, high gain--and unlike the posted circuit, Vce varies little as it starves the base drive of the series pass transistor, thus making it all the more confusing.

Any thought on this detail.

In the conventional circuit, with the emitter connected to the load, the voltage source for the current limit tranny is the voltage across the sense resistor, which is also Vbe. This should mean that the output load impedance is irrelevant to the gain of the current feedback loop.

Vce actually varies a lot in the IC during current limiting. During current limiting, the collector must pull the base of the output tranny down to the point where the load current=650mA. For example, if the set voltage is 5V, and the sense resistor is 1Ω (as they are here), and the load faults to 5Ω, the output voltage must be pulled down to (5Ω*650mA)=3.25V. If the load were a short, the output voltage would be zero, of course, and the output current will be 650mA. This means the Vce on the current limit tranny must be 3*Vbe ≈ 2V, when it is ≈ 7V under a normal load.

 

Wow, that is a cool simulation Ron H
As for the 0.1uF cap i guess i thought it would help with noise.. or something, i have probably slapped that on there without thinking much.. Now when i look, the examples in the data sheet show a cap on the non-inverting input but none on the inverting input.

I did a bit more testing last night, i wired up two TLC2272 in an instrumentation amplifier configuration (with "Rgain" open, gain = 1) and bam, the oscillations were back. However i tried putting a 10μF cap from the LM723 output pin to ground, and it became stable.. but i'm guessing this is probably not a good idea.

If i understand correctly you can't vary the gain of a differential amp with just one pot, as with the instrumentation amp?
Another thought; would it be a good idea to use a differential amplifier with a gain of let's say 10, and divide the output down with a pot before it is fed into the CL pin, and adjust the current limit that way instead of adjusting the gain?

Thanks for all your input on this

 

In your design MaggoT. Put a 100uF cap in parallell with a 100nF cap from the voltage output to ground.

 

By the way I found this model for lm723. Do not know how good it is will test later to day

.SUBCKT LM723 2 3 4 5 6 7 9 10 11 12 13 
* CL CS IN- IN+ VREF VCC- VZ OUT VC VCC+ FRCO 
* 
AZ1 15 12 ZENER1 
J1 15 7 7 JMOD
R1 15 16 15K 
Q1 16 16 17 QP1
Q2 20 16 19 QP1
Q3 20 21 7 QN1
C1 20 21 5PF 
Q4 12 20 22 QN1 
Q5 12 22 23 QN1
R2 23 6 100 
AZ2 25 6 ZENER1 
R3 21 25 30K 
R4 25 7 5K 
R5 12 17 500 
R6 12 19 25K 
R7 12 26 1K 
Q6 27 16 26 QP1
Q7 23 27 28 QN1 
Q8 27 28 29 QN1 
R8 29 7 300 
R9 28 7 20K 
R10 12 30 1K 
Q9 13 16 30 QP1 
Q10 22 5 33 QN1 
Q11 13 4 33 QN1 
Q12 33 28 34 QN1
R11 34 7 150 
Q13 12 13 36 QN1 
Q14 11 36 10 QOUT 
AZ3 10 9 ZENER2 
Q15 13 2 3 QN1 
R12 36 37 15K
I1 0 9 0 
I2 0 2 0 
I3 0 3 0 
.MODEL QN1 NPN (BF=200 BR=2 RB=200 RC=200 RE=2 TF=0.35N IS=1E-14 VAF=125 
+ CJE=1.0P VJE=0.7 MJE=0.33 CJC=0.3P
+ VJC=0.55 MJC=0.5 CJS=3.0P VJS=0.52 MJS=0.5 )
.MODEL QP1 PNP (BF=50 BR=4 RB=300 RC=100 RE=10 TF=30N IS=1E-14 VAF=50 
+ CJE=0.3P VJE=0.55 MJE=0.5 CJC=1.0P
+ VJC=0.55 MJC=0.5 CJS=3.0P VJS=0.52 MJS=0.5 )
.MODEL QOUT NPN BF=80 RB=10 RC=5 IS=1E-16 VAF=50 CJE=10P CJC=10P 
+ TF=3N TR=20N 
.MODEL JMOD NJF VTO=-3 RS=1 RD=1 LAMBDA=.02 CGS=5P CGS=5P 
.MODEL ZENER1 zener( v_breakdown=6.6 i_breakdown=0.02 r_breakdown=1.5 i_rev=1e-4 i_sat=1e-12)
.MODEL ZENER2 zener( v_breakdown=6.2 i_breakdown=0.02 r_breakdown=1.5 i_rev=1e-4 i_sat=1e-12)
.ENDS