I have to do some true/false concept questions for my homework about MOSFET's but I am unsure of two of them. If anyone could help, it would be great.


Q1) The MOSFET with n-type channel has the threshold voltage of +2 V; the gate voltage is +3V. The MOSFET is turned ON.


--For this one, I said it was true because I think if the gate voltage is below the threshold voltage, the transistor is turned off.



Q2)The semiconductor surface at the oxide-semiconductor interface can be inverted from p type to n type by applying a negative gate voltage

--I am not sure about this one.

 

Q1) The MOSFET with n-type channel has the threshold voltage of +2 V; the gate voltage is +3V. The MOSFET is turned ON.


--For this one, I said it was true because I think if the gate voltage is below the threshold voltage, the transistor is turned off.

Technically not true, the transistor being on requires Vgs > Vth, you have indicated that Vg > Vth, so it can only be true if Vs < 1V.

Q2)The semiconductor surface at the oxide-semiconductor interface can be inverted from p type to n type by applying a negative gate voltage


--I am not sure about this one.

What is the majority carrier in a P-type substrate? What kind of charge repels those majority carriers?

 

What is the majority carrier in a P-type substrate? What kind of charge repels those majority carriers?

May I ask a question that I am confused?
In NMOS, when we apply a positive voltage on gate G with Vgs>0, then there is a inversion layer of electrons in P semiconductor. What I am not sure is where these electrons come from?
Do they come from Gate pole or they come from two n type semiconductors at D and S poles?

 

Technically not true, the transistor being on requires Vgs > Vth, you have indicated that Vg > Vth, so it can only be true if Vs < 1V.

What is the majority carrier in a P-type substrate? What kind of charge repels those majority carriers?

The hole is the majority carrier and like charges repel each other, so it woulld have to be a positive charge. So it is false?

 

May I ask a question that I am confused?
In NMOS, when we apply a positive voltage on gate G with Vgs>0, then there is a inversion layer of electrons in P semiconductor. What I am not sure is where these electrons come from?
Do they come from Gate pole or they come from two n type semiconductors at D and S poles?

They come from both the source & drain wells, certainly also some from the inverted substrate, but I'm sure it is quite small by comparison.

EDIT: This is a really great resource, it explains this in very good detail...

 

Thanks tshuck! I have just looked over the material but I think it doen't go into detail my problem. Therefore, I want to ask you more.
For NMOS as in the attached file, when I connect G with positive pole of a battery maybe 3 V and the negative pole is connected to the B(Body) and S(Source). Then I see that there is a vertical electricity field go from G to B, thus I think that electrons majorly have to come from subtrate or from metal at the gate.
I don't know why electrons from D and S can go to the channel because it seems to me that the electricity isn't make a good condition for them to go to the channel.
Do electrons go to channel because diffusion?

 

I think you have a few misconceptions.

First, it is an electric field, that causes electrons to move.

Second, when the holes move away from the area under the gate, the acceptor dopants are left behind, being that they are a part of the crystal lattice, therefore, immobile, so the area has a negative charge. As Vgs increases, its electric field will overcome the repulsion of the negative ion sites against the electrons in the wells and attract the electrons toward the gate, since electrons are attracted to the positive charge on the gate. This leads to a majority of electrons as charge carriers, therefore an inversion of the p-type substrate.

So, what about an electric field in an intrinsic semiconductor is not sufficient for electrons to move?

 

I think you have a few misconceptions.

First, it is an electric field, that causes electrons to move.

Second, when the holes move away from the area under the gate, the acceptor dopants are left behind, being that they are a part of the crystal lattice, therefore, immobile, so the area has a negative charge.

Thanks for your helps. I get this part.

As Vgs increases, its electric field will overcome the repulsion of the negative ion sites against the electrons in the wells and attract the electrons toward the gate, since electrons are attracted to the positive charge on the gate. This leads to a majority of electrons as charge carriers, therefore an inversion of the p-type substrate.

Could you go in detail the part? What is "the electrons" that you said? Do you mean that they are electrons that come from D and S? If so, as in the picture in my previous post, I see that the electric field is vertical from G to B. How electric field attract electrons in D and S? I think if electric field is in the horizontal direction from D to S then electrons from S can easily come from S to channel and make a channel.
Please correct me where I am wrong.

So, what about an electric field in an intrinsic semiconductor is not sufficient for electrons to move?

Sorry, I don't know what you mean here.

 

You know that a positive charge attracts a negative charge and vice versa. The gate is made more positive than the p-type substrate. Without current flowing, we know that the n-doped wells are at the same potential as the substrate. As Vgs becomes more positive, electrons are attracted to the positive plane of charge (the gate), while holes, being the absence of electrons, move away from the gate.

Now, look at the MOSFET image you posted. You'll notice that the n-wells are situated so that a portion of the well is under the gate. Electrons from the well is attracted to the positive gate. Now, along a plane of charge, what is the strongest point of attraction? That's right, the center. So electrons will be attracted to the absolute center of the channel, since they are prevented from moving to the gate (not entirely true, some electrons do make it, but assuming 0 is enough for our example). So, electrons grim both source and drain are attracted to the middle of the channel. Enough electrons in the channel and you have readily mobile electrons. Put a voltage across the drain and source, and your electrons have become mobile. There are considerations regarding an asymmetrical channel from Vgd, which will modulate the channel depth, but that is a bit more "typing" that I want to do on my phone just now.

Regarding my intrinsic semiconductor question:
An intrinsic semiconductor will conduct, provided enough energy is supplied to it. A voltage applied to an intrinsic semiconductor will cause a current, dependent on the amount of energy in the semiconductor.

 

Thanks for being patient!

Now, look at the MOSFET image you posted. You'll notice that the n-wells are situated so that a portion of the well is under the gate.

Sorry, I don't see n-wells in my picture. Do you mean that n-well is put bellow gate as in the picture bellow?

 

Or is this n-well that you said?

 

Thanks for being patient!

Sorry, I don't see n-wells in my picture. Do you mean that n-well is put bellow gate as in the picture bellow?

No, I meant this picture, the one you posted in post #6:

Here it is colored:

Or, here's an image I originally made for the ebook showing things a bit clearer:

 

Thanks for nice pictures!

Now, along a plane of charge, what is the strongest point of attraction? That's right, the center.

I try to not ask more questions but there are many things confusing me. Sorry for that.
I want to explain this in more detail. In this case, NMOS, G is connected to positive, S and B are both connected to negative pole of voltage source. The voltahe potential at everywhere in gate is equal. The voltage between G and S is equal to G and B. Then I see that the electric field between S and G will be larger than
the one between B and G because E=V/d but d between S and G is small than d between B and G.
I think that you said center of channel is the strongest point of attraction because the B pole is put right under the gate???

 

Thanks for nice pictures!

I try to not ask more questions but there are many things confusing me. Sorry for that.

No worries, that's how you learn!

This talk makes me think I should buy my old semiconductor physics book again

I want to explain this in more detail. In this case, NMOS, G is connected to positive, S and B are both connected to negative pole of voltage source. The volta[g]e potential at everywhere in gate is equal. The voltage between G and S is equal to G and B. Then I see that the electric field between S and G will be larger than the one between B and G because E=V/d but d between S and G is small than d between B and G.

Sounds reasonable...

I think that you said center of channel is the strongest point of attraction because the B pole is put right under the gate???

Think of the electrons as being loosely bound to the crystal lattice, and as such, they are able to move about the crystal. since they are free to move about, they will move under the influence of a charge.

I would suggest you look into this tool from falstad to model what is going on under the gate.

So, let's look at this visually. In all cases, a single charge(electron) is attracted to a positively charged plate(gate).
First, a charge is attracted from the side:

Notice how the charge is pulled at an angle, toward the center of the plane of charge.

Next, an electron above the plane of charge:

It is being pulled straight down, though with a small amount of force.

Next, a charge being in just about the ideal state, large amount of force:

The electron is attracted to the middle of the plane.

This is also a pretty decent reference I just came across....

If you are up for a technical discussion of the physics behind the MOSFET and the underlying theory used in the MOS capacitor, this is a good read.

 

Thanks a lot tshuck! Very nice pictures and good materials.
I have just downloaded the software. Now it is better for me to read these materials carefully before continuing to ask more questions.