# Q-point/Stabilised bias circuit

Discussion in 'Homework Help' started by Bob12, Apr 16, 2010.

1. ### Bob12 Thread Starter New Member

Apr 15, 2010
2
0
Hi all, i have a question concerning q points and a stabilised bias circuit.

Q. Draw the subcircuit that is relevant for evaluating the dc currents and voltages and proceed to derive an equation for the load line.

My attempt for the sub-circuit is attached, i think the capacitors act as an open circuit at dc, which is how i arrived at that result, but i am not sure if this what the question was asking me to do.

The main problem i have is trying to derive the equation for the load line, my attempt at this part of the question is below:

Vcc=I1.R1+VBE+IE.RE
I2=(VBE+IE.RE)/R2
I1=I2+(IC/β)

These equations can be re-arranged to find:
Vcc=((VBE+IE.RE/R2)+(IC/β)).R1+VBE+IE.RE

The equation IE=IC(1+(1/β)) can be used to eliminate IE.

I eventually got an equation of VCC=VBE(R1+R2/R2)+IC.RE(R1+R2/R2), by somehow eliminating β from the equation, this doesnt seem to give me an equation i can use for a load line, so any help would be appreciated just to let me know if i am going in the correct direction or not and whether this equation is even close to being able to create a load line.

thanks

bob12

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• ###### subcircuit.jpg
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Last edited: Apr 16, 2010
2. ### Jony130 AAC Fanatic!

Feb 17, 2009
4,514
1,273
Try again with this equations:
Vcc = I2*R2 + I1 *R1

I2 = I1 + Ib

I1*R1 = Vbe + Ie*Re

Ib= Ic/Hfe = Ie/(hfe+1)

Ie = Ib+Ic = Ib
*(hfe+1)

3. ### PRS Well-Known Member

Aug 24, 2008
989
36
This is a question that makes me think your instructor is a sadist. And I suppose he or she demands, not the low level approximations which I use to my own satisfaction, but first order approximations based on the hybrid pi model? And this in spite of the use of 10% resistors? Very well. Let's have at it.

I need to go to Paint in order to draw what we are asked to create.... and that should do it. Look at the picture. That is what you are being asked. It is a load line.

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Last edited: Apr 17, 2010
4. ### PRS Well-Known Member

Aug 24, 2008
989
36
By your schematic everything is algebraic, no real numbers. That's okay. How about, as a preliminary, we thevinize the input? That is, we have an equivallent voltage across an equivalent resistance looking into the base of the transistor. So we take the input resistance as R1 in parallel with R2 and come up with an equivallent Rb.

As for the Thevenin voltage we have by voltage division Vbb = [R1/(R1+R2)]*Vcc

Now we do a Kelvin loop around this and the emitter and we get:

Vb = (Vbb - Vbe)/[Re + (1/Rbb+beta)]

So there's your base voltage. (There is a much easier way to find this in most circumstanes, but I suspect your prof is pedantic and so the "exact" equations.)

Ve is simple. It's a matter of the voltage drop across a silicon or a germanium diode .6 or .2 volts respectively. Most texts focus on silicon and so we'll use .6 volts. Some texts claim .7 volts, but my hands on experience claims for .6 volts. And we'll keep the generic Vce for your prof's sake.

Knowing Ve, we know Ie because Ie=Ve/Re. And knowing the beta of your xistor, you can calculate Ic, which is nearly Ie, but lower by a small fraction. Knowing Ic you can calculate Vc as Vcc - Ic*Rc and that gives you Vce as Vc - Ve.

If I left something unanswered let me know. I am absent minded. Sorry.

As an appendage upon editing: I didn't tell you how to figure Icc. This is the maximum current possible given your design. Vcc/Rtotal is the idea here but there is also a saturation voltage of about .2 volts for silicon across the collector and emitter. So Icc = (Vcc-Vsat)/(Rc+Re). Simply speaking, there is no more current available no matter what.

Last edited: Apr 17, 2010
5. ### Bob12 Thread Starter New Member

Apr 15, 2010
2
0
Thanks for the help everyone, i'll see if i can get something together with this now.

Bob12

6. ### PRS Well-Known Member

Aug 24, 2008
989
36
You're welcome Bob. Just holler if you need more help. By the way Ve = Vb - Vbe.

Wishing you the best.