Hi, everyone,
I'm facing some issue when fixing SMPS, I'm appreciate if you have any opinion or advice

Brief:
A forward converter using pulse transformer to drive high-side MOSFET will short through with low-side MOSFET when applying 0-5A@1kHz dynamic load, and the power supply can deliver maximum 12V, 10A.
Continue load is okay, load drop is also good, only happened when applying heavy load.
After some test and try, I found adding few ohm R (10-47) and reduce C (to 0.1uF) at primary side of pulse transformer can help.
I'm wondering how to calculate the coupling capacitor, or actually my direction was wrong, its not capacitor's issue.

The story:
I have a forward converter using NCP1562A as main controller, the schematic is in attatchment.
Sorry for the covered part, but its only for the start up voltage tuning and some protection circuit, not important for this issue.
schematic

The main issue is when testing dynamic load, the high-side MOSFET and low-side MOSFET will short through and causing the OCP protection althought the MOSFETs are not damaged.
The failure waveform seems like this, channel information is inside the picture.
The blue signal (U3 OUT2) somehow drop a little bit (the third pulse count from left),
so the pulse transformer secondary also raise a little bit and turn-on the high-side MOSFET then cause short through.
After the failure, next PWM comes in and cause main transformer (T2) saturate.

Note:
The blue signal should be invert because the pulse transformer is inverse, and all the probe are keep ground path as small as possable.

I had test following item to find the source of fault:

1. Check is secondary self-excited circuit
I measure secondary SR MOSFET Q17 Ids to check is the fault waveform/energy transmit to another side, and it seems not.
And low-side driving signal acts correct.

Note:
The blue signal sudden raise is where the short through happened, main transformer secondary current seems okay.

2. Check high-side driving current
Because NCP1562A has different sink/source capability at two output, so I guess maybe this cause some issue.
It seems the IC should sink current but actually, its push some current and drive the gate to high.
But I'm not sure is the voltage cause the current high or the current it self cause the transformer high.


3. So I try to digging in the gate drive circuit and its behavior, I add 20ohm resistance and change coupling capaciance to 0.1uF.
Compare to 0.47uF (light color waveform), it makes huge difference in gate driving current, also fix the short through issue.
I also measure the voltage of coupling capacitance but I'm not sure is there any information can be found here.


For now, I found a reference document for coupling capacitance calculation here:
Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) (ti.com)
I'm trying to verify is the root cause is the coupling capacitor.

The question is:
1. Is this phenomenon cause by wrong valus of capacitor or maybe its caused by pulse transformer saturation?
2. How do you think about the analysis above, is there anything I missed?

Thanks for you reading here, its a long artical.
Have a nice day!

 

I see a couple of issues here. Yes the capacitor is likely not at fault here but a victim. The gate driver circuits for a two switch
forward converter need to be identical regardless of using a gate transformer or not. I don't see a gate resistor in the upper
gate circuit and should be the same circuit as the lower FET to match performance. This is necessary to match the volt seconds of
the main power transformer or a DC unbalance can occur causing saturation. The same is true for the gate drive transformer.
These gate drive transformers regardless of manufacturer need to have the core reset when using uni-polar drives on the primary.
I believe the capacitor is being damaged by the un-snubbed flyback energy from the magnetizing inductance on the core of the
gate drive transformer and exceeding the voltage rating of the DC blocking capacitor causing it to fail. I normally use a
bi-directional TVS to clamp gate drive voltage spikes and to reset the core of the gate drive transformer.
I also recommend introducing a small gap into the main transformer core to handle the volt-second imbalances from the
PWM slewing due to load transients.

 

Hi, Prepka:
Thanks for your detailed reply!
I'm agree with you there should be a TVS to clamping the voltage.
But my fault, the waveform 4, Channel 2 should be C12 voltage.
Therefor, I also measure the C43 voltage, It seems okay (but you're right, there still a risk).
I use "intiger function" of oscope to observe if the pulse transformer is volt-second balanced or not,
The max volt-sec product is 40.8 shows by DA-2318-AL datasheet, I find out decreasing the coupling capacitor can help reduce the maximum volt-second product.
Following waveform shows C12 = 0.47uF and C12 = 0.047uF.

1. C12 = 0.47uF, Max volt-sec product is 59uVolt-sec


2. C12 = 0.047uF, Max volt-sec product is 29.7u Volt-sec

I also do the simulation for driving circuit, just to check the coupling capacitor behavior is predictable.
The SIMPLIS file attatched here.

Thanks for all reader read here!