# Pull up questions

Discussion in 'General Electronics Chat' started by Rbeckett, Apr 30, 2012.

1. ### Rbeckett Thread Starter Member

Sep 3, 2010
205
32
I would love for someone to enlighten me on how a pull up or pull down functions. I have seen many reference to using a "weak" or "strong" pull up in some various technical lit I have been reading. I understand the need for a particular pull, such as insuring that a circuit is either fully on or fully off, but I just can;t wrap my head around the concept of what makes one either weak or strong and why it would matter. I know this is basic stuff, but I have been struggling with resistance in general. I can do all the math required for Ohm's law and can select the correct resistors but I still can't get why the results are what they are. So an explanation from a different point of view may help me immensly. Thanks in advance for not flaming me for such a basic question, but I am self training in electronics and need all the help I can get on even the simplest stuff from time to time. Have a great day and Thanks!!!!

Wheelchair Bob

2. ### DerStrom8 Well-Known Member

Feb 20, 2011
2,373
1,355
I imagine you'd need a weak pullup/pulldown if your signal is weak (has low voltage/current). It will take less of a signal to pull it low/high. A strong pullup/pulldown would be if you have a strong signal (high voltage/current). It would be less sensitive to an external signal.

That's how I've understood it, anyway.

Regards

3. ### MrChips Moderator

Oct 2, 2009
19,114
6,145
This is a perfectly valid question and the answer is much more complicated than you could ever imagine. To understand the implications you must read the data sheet of the specific devices.

I will give you answers for the different situations:

TTL INPUTS

If you read the data sheet of a typical 7400 series or 74LS00 series gate, you will see specs such as:

I IH = 40μA
I IL = -1.6mA
V IH = 2v
V IL = 0.8v

Learn what these mean since they are very important in determining the required PULL-UP and PULL-DOWN resistors. This is done simply by applying Ohm's Law.

A common error made by newcomers to digital electronics is to assume that the input of a gate is ZERO when nothing is connected to the input of the gate. This is incorrect.

Based on the data given above, a TTL LOGIC input will need a pullup resistor between 1kΩ and 4.7kΩ to ensure that the input is HIGH when not driven by another TTL gate or low impedance SOURCE.

Conversely, a TTL LOGIC input will need a pulldown resistor between 100Ω and 220Ω to ensure that the input is LOW when not driven by another TTL gate or low impedance SINK.

CMOS INPUTS

The similar conditions apply with CMOS LOGIC GATES. In this case, the four parameters listed above are very different from those of a TTL GATE. More importantly, since the input impedance of a CMOS gate is very high, the input currents are very low, typically less than 0.1μA.

Hence for CMOS gates, input PULL-UP and PULL-DOWN resistors can range from 1kΩ to 1MΩ and the gates may still function properly.

(Because of the low input currents of CMOS gates, it is very important that all unused inputs of CMOS gates be connected to a low impedance SOURCE or SINK, for example, VDD or VSS).

TOTEM POLE OUTPUTS

Before considering the PULL-UP resistance required at the output, it is important to learn how TOTEM POLE OUTPUTS function without the need for either PULL-UP or PULL-DOWN resistors.

Totem pole outputs provide ACTIVE PULL-UP and ACTIVE PULL-DOWN and hence do not normally require external resistors.

OPEN-COLLECTOR OUTPUTS

Logic gates with OPEN-COLLECTOR outputs do not have ACTIVE PULL-UPS. Hence one must be provided. The output can SINK current with its built-in ACTIVE PULL-DOWN. In order to SOURCE current, an external passive PULL-UP resistor must be added to the circuit. The value of the resistor will depend on the amount of current required by the load.

(It is a common mistake by the uninformed to ignore the PULL-UP requirements for commonly used ANALOG COMPARATORS such as LM311, resulting in failure of the circuit to function.)

OPEN-DRAIN OUTPUTS

CMOS circuitry do not use bi-polar junction transistors (BJT). They use field-effect transistors (FET) or MOS-FETs instead. The equivalent of the collector in a BJT is the drain in a FET.

Hence in a CMOS circuit where there is no ACTIVE PULL-UP, this is called an OPEN-DRAIN OUTPUT. The situation is the same as for OPEN-COLLECTOR OUTPUTS. The calculation for the value of the external PULL-UP resistor is the same.

WEAK and STRONG PULL-UP

As you can see from the previous discussion, the value of the PULL-UP resistor can be between 1kΩ and 1MΩ. A value greater than 10kΩ might be considered WEAK and a value less than 10kΩ would be considered STRONG.

Some microcontroller units (MCU) will allow the user (programmer) to enable WEAK PULL-UPS if desired.

Last edited: Apr 30, 2012
4. ### strantor AAC Fanatic!

Oct 3, 2010
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Printed, and inserted into the "book of knowledge" binder.

5. ### DerStrom8 Well-Known Member

Feb 20, 2011
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Yup, guess I was way off

Thanks very much, MrChips. You've cleared up a lot on my end

Regards

6. ### MrChips Moderator

Oct 2, 2009
19,114
6,145
If you need detailed examples on how to calculate the appropriate values given the specs for V IH, VIL, I IH and I IL, I would be happy to do so.

shortbus and DerStrom8 like this.
7. ### wmodavis Distinguished Member

Oct 23, 2010
739
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They don't call him MrChips for nothing. Excellent explanation!

8. ### Rbeckett Thread Starter Member

Sep 3, 2010
205
32
Thank you thank you thank you!!!!!!. I really appreciate the easy and understandable answer. I have been toying around and didn't understant that concept well enough to know why and how much was required. So an input or output without a pull up or down could almost be considered floating? I'm trying to get multiple LEDS to lite from the input of multiple DS18B20's and was struggling with that when it came to turning them off completely when others were potentially supposed to be turned on. That makes it alll make sense to me much much better.
Wheelchair Bob

9. ### wongchoy88 New Member

Sep 10, 2014
4
0
Mr. Chips, i would like know more detail how to calculate the appropriate values for the pullup resistor. And i have one more question:
if i using a open drain part (example: NOT gate) to control more than 16 muxes. is it sufficient to have one pullup resistor only?

10. ### MrChips Moderator

Oct 2, 2009
19,114
6,145
This is an old thread but if you really want to know how to calculate the correct values for pull-up and pull-down resistors I will oblige.

This is actually two separate questions and situations, one for pull-up/pull-down for inputs and the second for pull-up at outputs.
Also the values will differ for TTL gates and CMOS gates but the principle and calculations are the same.

The calculations are given for worse case scenarios and hence the results will give you a range of values for you to choose.
In the case of CMOS gates, because input currents are extremely low, you have a much wider range.

I will post the equations at a later date. The same equations are given in the Texas Instruments "The TTL Data Book for Design Engineers" and ought to be in any respectable textbook on digital logic design and interfacing. When I post the solutions I will make it a "sticky".

To answer your second question, one pull-up resistor will do, but it is important to know whether the gates are CMOS or TTL and if TTL, which family of TTL logic (i.e. LS, ALS, F, S,etc., as in SN74LS00 for example).

Last edited: Sep 10, 2014