Project: TTL Logic probe.

Thread Starter

bertus

Joined Apr 5, 2008
20,567
Hello,

Here I have designed a TTL Logic probe with pulse detection.



I hope the drawing is clear enough.

Greetings,
Bertus
 

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Nice circuit!
I would have designed the circuit so that a logic low would give a '0' on the LED display, a logic high would give a '1', and a pulse would give a 'P'........also would replace the TTL with a 8-pin 8-bit micro like a 12F675 so as to make the final PCB as small as possible, also the 12F675 has a wide operating range (2.0-5.0V), so you would be able measure logic from 5V to 2V, if you use the logic circuits power supply.
The 12F675 might work at 1.8V, but haven't tried it.
 

Thread Starter

bertus

Joined Apr 5, 2008
20,567
Hello electronictech,

I want to show the pulse type and not only levels H and L or 1 and 0.
With the probe you can also detect needle pulses with mainly high or mainly low.
The needle pulses can be only a couple of micro seconds wide, the mono flop will stretch the pulses to make them visible.

Greetings,
Bertus
 
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ericlai

Joined Jul 8, 2009
1
hello bertus, is there any simpler circuit for TTL logic probe using only leds which represents high and low........and with audio output....??? I'm designing a TTL logic probe that must have a clear visual and audio indications of high and low logics....can u help me with this???
 
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Thread Starter

bertus

Joined Apr 5, 2008
20,567
Hello,

Yes, you can replace the pulse stretcher with a monostabile multivibrator circuit using an 555.
When you replace the gates with CMOS types like the 4049, you can use the circuit from 5 to 15 Volts.

Bertus
 

crutschow

Joined Mar 14, 2008
25,117
I would consider making a probe with battery power (e.g. 2 AAA alkalines) so you don't have to make a power supply connection (which could be tricky in some commercial circuits).
 

joeyd999

Joined Jun 6, 2011
4,401
Not sure I understand correctly.
I was convinced the TTL's output can't be recognized correctly by CMOS input.
https://www.allaboutcircuits.com/textbook/digital/chpt-3/logic-signal-voltage-levels/
Am I right ? What am I missing ?
You are correct about the "guaranteed" input/output levels for each of the technologies.

But you could look at this another way: both technologies have totem-pole outputs; therefore, they are capable sinking current in the low state, and sourcing current in the high state. If you ignore the output voltage and just determine if the output can sink or source a small amount of current, you can detect highs and lows regardless of the tech.

Additionally, you could also detect neither sinking or sourcing, thereby detecting a Hi-Z (or probe disconnected) state.
 

2Hexornot2Hex

Joined Apr 16, 2020
29
...If you ignore the output voltage and just determine if the output can sink or source a small amount of current, you can detect highs and lows regardless of the tech.
Hmm...
When the first component, the Inverter, gets the input signal - it will recognize whether it's '0' or '1' according to the INPUT_Voltage, no ? (How the voltage can be ignored ?)
We're talking about the same schematics, that's attached to the original post, right ? (just TTL inverters replaced by CMOS)

In case of TTL_Vout=2.8V ['1'], do you mean it will be recognized, for sure, by CMOS as '1' (although 2.8V < CMOS_Vih_min=3.5V) ?
How come ? I'm still confused
 

joeyd999

Joined Jun 6, 2011
4,401
Hmm...
When the first component, the Inverter, gets the input signal - it will recognize whether it's '0' or '1' according to the INPUT_Voltage, no ? (How the voltage can be ignored ?)
We're talking about the same schematics, that's attached to the original post, right ? (just TTL inverters replaced by CMOS)

In case of TTL_Vout=2.8V ['1'], do you mean it will be recognized, for sure, by CMOS as '1' (although 2.8V < CMOS_Vih_min=3.5V) ?
How come ? I'm still confused
You'd use voltage thresholds only if you intend to indicate not only high/low, but also that the high/low voltages were within the specified limits of the tech.

If you use sink/source, then you can detect high/lows regardless of the tech, but you will not be able to determine if the signals were appropriately in spec for a given tech.

Sink/source can be detected by replacing your input gate with a couple of bipolar transistors.
 

crutschow

Joined Mar 14, 2008
25,117
In case of TTL_Vout=2.8V ['1'], do you mean it will be recognized, for sure, by CMOS as '1' (although 2.8V < CMOS_Vih_min=3.5V) ?
How come ? I'm still confused
You are confusing the TTL Vin specification with the Vout values, which are different.
The Vout high is normally within a couple diode drops of V+ (about 3.5V), and low within a few tenths of a volt above ground.
So the CMOS logic level should normally detect the TTL output level correctly as high or low.
 

2Hexornot2Hex

Joined Apr 16, 2020
29
You are confusing the TTL Vin specification with the Vout values, which are different.
The Vout high is normally within a couple diode drops of V+ (about 3.5V), and low within a few tenths of a volt above ground.
So the CMOS logic level should normally detect the TTL output level correctly as high or low.
I'm not confusing:
SN74LS02 (TTL NOR gates)
Vout high min is 2.7V (level of 3.5V is typical)

Normally doesn't cover all the possible cases.
74ls02.png
 
Hello,

Here I have designed a TTL Logic probe with pulse detection.



I hope the drawing is clear enough.

Greetings,
Bertus
Did ypu really make it? Or draw only?
1. 74ls series haven't z-state for TTL, only "0" or"1". On the not connected input you have 1 (for ls series).
2. An unconnected TTL-input puts a heavy load on the output of the device under test.
3. Without emitter followers, it is impossible to set the trigger threshold.
2 variants of schematic - only on 7400 and 74123
варианты.png
 
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