I'm trying to work out the power dissipation of a CMOS device74HCT08 from the data sheet I get this formula, I don't understand the fi & fo(I surmise this means Inputs may be changing numerous times without reaching a state that affects a change at the outputs) If I'm right in this assumption what duty cycle/ ratio do you use for calculation?
PD = CPD ´ VCC2 ´ fi + å (CL ´ VCC2 ´ fo)
fi = input frequency in MHz;
fo = output frequency in MHz;
å (CL ´ VCC2 ´ fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
PD = CPD ´ VCC2 ´ fi + å (CL ´ VCC2 ´ fo)
fi = input frequency in MHz;
fo = output frequency in MHz;
å (CL ´ VCC2 ´ fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.