Pins of a Flip -flop | reset and preset | verilog code

Hi Guys,

I know this seems to be a basic question, but also it doesnt seem to be very basic.
Please help out with this,

We all know , the pins for a D flip-flop are D,clk, Preset and reset (inputs) and the Q and Q` are outputs.
Here comes the question, in the real chip does the flop really have both the preset and reset pins ?
Because I see only either preset or reset are needed but not both,

For example, in this below example "a <=0" indicates it needs only a reset. if the code had been "a<=1" then it would have needed preset.
As in verilog synthesizable code we write

always @ (posedge clk or negedge reset_n) begin
if (!reset_n) begin
a <=0;
end
-----
-----
end

Can some one please clarify this!!.

Or is it, we will have either a preset or reset based on the code written , ???