PIC16 with 3 external interrupt


Joined Jun 26, 2012
I don't think there is one that has 3 dedicated external interrupts.

You can get to 3 external interrupts by using IRQ for one and configure the 2 ECCP modules to capture one edge and generate an interrupt.

If at all possible, consider the 18F (e.g. 18F4520) which does have 3 ext IRQs.


Joined Jun 26, 2012
In fact most PIC16 chips have some interrupt-on-change pins.
Of course you then need some code to see which pin has changed.
Technically correct but you would have to take a few more things into account.

The code, as you indicated, would have to keep a previous copy of the port to determine which bit changed. Easy enough but you also get interrupts when you don't need them i.e. if you are interested in the rising edge, you'll have to dispense with the interrupt(s) from the other edge(s) which increases complexity and wastes CPU time.

A more insidious problem is that the mismatch condition that causes the interrupt is not latched. If the interrupt signal is short relative to the time it takes to service it (a problem especially when other interrupts are in use) the interrupting signal may be gone by the time RBIF is serviced making it impossible to determine the source.

A subtle problem exists in the fact that the mismatch condition and RBIF are cleared at different times (read the port, clear RBIF or vice versa). In unlucky cases, this can cause the loss of an interrupt.

Finally, since any reading or writing of PORTB clears the mismatch condition, uCHIP recommends that interrupt on change be the only thing that PORTB is used for (4.2 in the datasheet). That doesn't leave much left to work with on an F84.

Its not a case of whether it can be made to work. I just think that in this case, its starting out behind the 8 ball. If you haven't picked a part yet, pick one with everything you need from the get-go. There is always time later to run out of resources...



Joined Feb 14, 2010
Most of the problems JohnInTx mentions associated with Interrupt-On-Change have been eliminated in the newer enhanced mid-range devices (which have been around for several years). On those devices you can select interrupt on rising or falling edge, or both edges, for each pin and you have a flag bit for each pin so it's easy to identify which pin caused the interrupt and you don't lose IOC interrupts if the pin level changes before you service the interrupt.

Cheerful regards, Mike
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