Hello everyone,

I was wondering when the PIC microcontroller is set to receive interrupts from any source, and you have just received an interrupt and you have not yet set the interrupt flag to 0 and another interrupt happens, is that interrupt ignored or will it be handled after you switch the interrupt flag back to 0. Is there some sort of first in first out queue for interrupts or are they just ignored when two happen relatively at the same time. I'm using the pic 16f8 series if that is any help.

Thanks

 

To avoid such problems, the first action on receiving an interrupt is to disable further interrupts. If another interrupt occurs before this can be done, it will be up to your code (interrupt handler) to decide how to deal with the situation.

 

But after you disable further interrupts, does that make the ones that happened while interrupts were disabled never interrupt, or do they wait until the interrupts are enabled again and then interrupt.

 

You need to read the data sheet about that with that microcontroller. But without a latch to grab the second one, you may miss it. If you think this could be a problem, perhaps you need to rethink the control loop.

 

First off there is no need to disable interrupts in the IRS routine, the PIC processor does this for you automatically, it also re-enables them when you issue a return from interrupt.

Even though interrupts are disabled while you are in the ISR, if an event that would normally cause an interrupt occurs, the relevant flag will get set. The obvious solution therefore is to check and clear the flags when you first enter the ISR. If another interrupt event occurs while you are in the ISR the relevant flag will get set and it will cause a second interrupt the instant you do a return.

The other thing to do is not to hang around in the ISR, do what needs to be done and get out quickly, if the ISR task is going to take a long time set a flag, get out, and perform the task outside the ISR.

 

If you search Microchip for interrupt priority, you will find several chips with multiple priorities. The 18Fxxxx have two levels, high and low.

From an 18FXXXX datasheet:
7.0 INTERRUPTS
<snip>...and an interrupt priority
feature that allows most interrupt sources to be
assigned a high priority level or a low priority level. The
high priority interrupt vector is at 0008h and the low
priority interrupt vector is at 0018h. A high priority
interrupt event will interrupt a low priority interrupt that
may be in progress.

There is also discussion of nesting interrupts, and of course, cautions that must be taken to avoid corrupted processes when an interrupt is itself interrupted. I have never used that family of chips, but suspect there are members here with experience in using that feature.

John

 

Actually All PIC16 chips have only one interrupt. Only the PIC18 series and above have multiple interrupts.

 

AlexR - to clarify for Solpic, they may have only one interrupt vecor, they have multiple interrupt sources.

It is up to the program in the interrupt routine to determine which interrupt source is active and take appropriate action, eg. for a timer interrupt or a serial port receive interrupt etc.

Solpic - Don't forget that if programming in assembler, you need to save the registers at the start of the interrupt routine before you change anything and restore them before returing from the interrupt.

 

Hi solpic,
Since you are using 16F series, let me clarify your doubt.
Pic 16F series is having only one interrupt vector, no priority. You can enable many types of interrupts but when any one interrupt happens, then that interrupt flag will be set. Till you make that interrupt flag 0, no other interrupts will occur. If you want first come first serve, you should serve the interrupt happened and then clear that int flag before retfie instruction. Since Pic 16f series does not have interrupt priority and have only one interrupt vector, it is better to handle interrupts one after another.
Please read the datasheet and you will be clear.

 

plz help me to write pic interrupt both internal as external c code?