I was wondering which of the following layouts for adding a decoupling capacitor to each IC is preferred, or at least compare the options critically.
Figure 1 represent connecting the capacitor, IC pin and trace with a triangular area of copper.
Firgure 2 represents connnecting with the capacitor to the power trace with a similar wide trace.
Figure C is similar to the previous example, but a narrow trace is used.
Figure 4 puts the capacitor lead right on the power trace.
Comments?
Figure 1 represent connecting the capacitor, IC pin and trace with a triangular area of copper.
Firgure 2 represents connnecting with the capacitor to the power trace with a similar wide trace.
Figure C is similar to the previous example, but a narrow trace is used.
Figure 4 puts the capacitor lead right on the power trace.
Comments?
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