Hi Everyone,

Is it possible to do peak to peak detection on a varying in amplitude and decreasing sine wave?

Thanks,

Austin

 

Yup. The derivative passes thru zero and changes sign at a peak.

 

You might not be using a microprocessor. If you aren't, better questions get better answers.

 

What frequency range are we talking about? Audio? RF? ......

 

Sorry for the vague question. I'll try to elaborate a little more. I'm working with RFID, and the frequency is 134.2 kHz.

Here's a link to the RFID reader I'm using:

http://www.priority1design.com.au/s...oducts_id=37&zenid=sp55953q7uo73kprq3fptm4235

Also, here's a link to the RFID IC used on the above RFID reader:

http://www.emmicroelectronic.com/webfiles/product/rfid/ds/EM4095_DS.pdf

On the RFID reader, there is a pin, Vr, from which the sine wave signal (both carrier and modulated signal) can be accessed. It seems as though the EM4095 IC works on a timer - when the signal is viewed with an oscilloscope (image attached), there is a starting pulse. On regular intervals afterwards, the carrier signal is diminished, leaving only the modulated signal. The width of these intervals increases when an RFID tag is picked up by the reader. In the end, I want to find the total time, between starting pulses, that the carrier signal is diminished, since this should correlate to read strength.

First, I want to be able to detect when the carrier has been diminished.

The thought I have is to use a p2p detector, which will indicate when the sine wave has subsided below a certain amplitude.

As a side note, I have interfaced the RFID reader with an arduino microcontroller. Nevertheless, I would like the circuit I'm designing to operate independently from the Arduino.

 

Pretty much guessing here, but this seems like a job for a precision rectifier.
Some variation on one of these circuits...

 

I misunderstood the initial request. Maybe I still misunderstand, but it sounds like you want to determine an AC voltage. The simple way to do that is to full-wave rectify it and then filter it with a low-pass filter (a capacitor).

The RC time constant of the capacitor and the load needs to be long enough to filter out ripple and gaps, but short enough to respond in the time you need.

This scheme only works if you have voltages above the drop of 2 diodes in a simple rectifier, ie. >1.4V. Op-amp rectifiers don't suffer that limitation.

 

True, but most opamp rectifiers also don't handle 134 KHz well. What about a schottky barrier rectifier for speed and low Vf, and only one? With the well defined wave shape and a high carrier frequency relative to detection time, you probably don't need the extra definition (and reduced signal) that full wave gets you.

But wait, there's more. While the initial question was about p-p detection, the followup question is about time, not amplitude. The output of a 134 KHz missing pulse detector (transistor switch, RC ramp gen, fast level detector) can drive an integrator (switched current course, cap, reset transistor) to sum the drop out time as a voltage level.

ak

 

True, but most opamp rectifiers also don't handle 134 KHz well.

The slew rate required seems to be 4.216 V/usec
if that helps at all.

I suppose the diode(s) are another sticking point.

 

AnalogKid,

The missing pulse detector seems very promising. I have one follow-up question before I begin designing the circuit. There is a negative pulse that acts as a trigger; unfortunately, the amplitude of the trigger pulse is less than the sine wave of the carrier signal. Any ideas how to still utilize the pulse?

Thanks again.

 

All we have to go on is the fuzzy scope shot, but based on that we should be able to get the gap width +/- 1/2 cycle of carrier. Actually, that would be another way to do this, lock to the carrier and use it to count the number of missing cycles (half-cycles, quarter-cycles...), a digital integrator.

A negative pulse on the same signal line, or somewhere else? Also, how negative, how wide, etc.? Can you make a sketch of the complete waveform with the important parts pointed out? Pretty is nice, but a cocktail napkin and a phone photo will work.

ak

 

Can you make a sketch of the complete waveform with the important parts pointed out?

+1
That would help a lot.

 

I attached an image. I hope this helps. Also, based on suggestions, I'm working on a schematic which I'll post when ready - I'm working with the idea of digital integration that was suggested earlier.

 

I attached an image of the circuit I'm proposing.

First there is a coupling cap to remove the dc bias. Afterwards, a buffer to ensure isolation from the RFID reader. After that, the circuit breaks off into two sections. On the right the counter section includes of a comparator, which feeds an input signal to a counter IC. Binary output from the counter is fed directly to the arduino. In the reset section, there is an integrator. With normal oscillations, the integrator remains around 0v, but the trigger pulse will create a negative voltage on the integrator. If this voltage surpasses a ref voltage on the adjoining comparator, the comparator's output will activate a bjt, grounding and resetting the integrator. at the same time, the output will send a reset pulse to the counter.

Remaining questions/comments:

• Can the op amp buffer operate at 134.2 kHz? When I viewed the signal through such a buffer, the signal was distorted.
• Can the arduino sample the binary output from the counter fast enough before the whole circuit resets?

 

Here's the schematic.

 

Any video opamp that is unity-gain-stable should work as a buffer.

If I read the sch correctly, your counter is counting up (integrating) individual cycles of carrier. Is this what you want, because I though you wanted the length of time of the carrier *gaps*. If you know in advance the exact time periods of carrier-bursts-plus-gaps, you can calculate the gaps. If you want the counter to give you the width of a gap measured in carrier cycles, you're not there yet.

To get there you need a continuous source of the carrier frequency. It is the counter clock, and the output of the missing pulse detector is the counter enable. If you know the minimum gap width, a second missing pulse detector with a longer time constant gives you an end-of-gap signal to tell the uC to take a reading.

If the start pulse always is negative, you can pick it off with a simple comparator for faster detection.

ak

 

AK,

You are correct that I want the amount of time that the carrier gaps. Also, I don't know the exact time of carrier bursts plus gaps, so as you said, I'm not there just yet.

Quick question before I change the schematic. Any recommendations on how to lock on to the carrier signal? I though of a PLL, but to my understanding, that won't work since the PLL will lose its lock as soon as the carrier bursts diminish.

 

Quick question: Whe the carrier reappears after a gap, is it in phase with the carrier before the gap, or does the phase change randomly as if an oscillator is shut down and then restarted?

ak

 

I would assume that the carrier signal remains in phase. I'll double check tomorrow though just to make sure.

 

From the 1950's: If the carrier is cruising along and is gated, then a tank circuit will ring at the carrier freq and phase through the gap providing a continuous clock for the counter. If you need regenerated carrier for a longer time period, the tank circuit becomes a tank oscillator, injection locked. And, you can tune the tank for a multiple of the carrier to get higher resolution without a PLL. If the carrier is derived from a crystal osc, an identical crystal osc can be used as an injection locked osc for super stable timing. This was the heart of the color demod circuit in every color TV on the planet before HD.

ak