Oscillator Parasitic Capacitance

Discussion in 'The Projects Forum' started by lattesurf, Mar 9, 2008.

  1. lattesurf

    Thread Starter New Member

    Mar 6, 2007
    Gday all,

    i've a question regarding the parasitic capacitance of a typical 3819 JFET used in an Colpitts oscillator setup.

    The freq i'm targeting for is 25MHz, so far done up all the calculations and simulations in PSpice. Got it to oscillate, but rather at 22MHz instead.

    As seen in the schematic attachment, C1 and C2 were supposed to be 16pF each, together with L1 of 5uH to oscillate at approx 25MHz. But i would need to tune C1 down to about 8pF to get somewhere close to 25MHz. VPulse is at 10V for 100ms.

    JFET Capacitance Specs:
    Cgs: 4pF
    Cgd: 1.6pF

    i can't seem to find much info about the JFET parasitic capacitance on the net. The nearest i could find was increasing the resistance between the Base & Emitter in a BJT to counter the parasitic problem. Which eventually i figured to decrease C1 from 16pF to 8pF (correct me if i'm wrong) in order to increase the Gate-Source resistance.

    The question is, is this right way to counter the parasitic problem? If it is, what is explanation for this solution (if my version above is incorrect).

  2. Audioguru


    Dec 20, 2007
    Your wiring also has stray capacitance. All the capacitance must be considered.