Hi, this thread should not be about how to make the oscillations stop, but rather how to make them going.

I am building a simple temperature regulator, and I am trying to reduce the temperature variance by making the comparator work in a "pwm regime". The idea is that as the comparator reaches the treshold, its output should start to oscillate to produce a lower power on the heater, and as the temperature rises further the oscillations should stop and the output should be in off state permanently. It would be perfect if the duty cycle will be changing through the transition, but it is not necesary.

Any idas how to introduce the right amount of feedback to make it work like this? My idea of the frequency is less than 10kHz.

 

Have a look at the attached.

NTC is a thermistor with a negative temperature coefficient.

R7 could be a resistor in series with a pot to provide adjustment of the threshold.

U1a is set up as an astable multivibrator with a frequency of about 140 Hz. You could easily increase the frequency to ~1.3kHz by reducing C1 to 1nF (0.001uF). Better to reduce capacitance first, and then you might reduce R4 somewhat.

You can reduce the area of PWM if desired, by increasing R3.

The circuit will be somewhat affected by the temperature of Q1, as that will change the Vbe for a given current.

 

Thanks sgt, that will work for sure, I was just thinking if it is possible to achieve using a single comparator like just adding a resistor and capacitor to the right place that would make the comparator unstable at the treshold.

 

See the attached for one way to accomplish that.

The transistor causes the circuit to have a pretty narrow temp range.

 

Hi I just posted a scheematic for a project I am struggling with ....
The dual comparator is working exactly as you require ... in fact its the only part of my circiut that is any good at all.
The supply voltage to the IC U1 isnt crytical, provided its within tollerance and greater than your refrence.
This aproach will work almost any high impedance input, single rail comparator.
It will run from several Hz to several hundred KHz if you fiddle with the values.
The 33K / 100K devider sets the hystoreasis and thus amplitude.
the 47K charges and discharges the small cap attached to it which sets the freequency. Its not quite symetrical but that probably won't matter to you.

Pulse width is govened by the level at U1b-the bigger the amplitude at U1b+ the greater the range over which PWM is applied.

-DO NOT USE MY FET GATE DRIVE-
The previous posts are what I would normally do and understand to be correct.
see http://forum.allaboutcircuits.com/showthread.php?t=42552 for the image
[I dont want to hijack your thread with my attachments]
Hope it helps
Al