Old Friend the Common Emitter Amplifier

Thread Starter

johnnyturbo

Joined Feb 20, 2010
6
Masters of the Transistor Universe:

I am trying to design the amplifier pictured below (from our old friends Horowitz & Hill) so that I have a mid-band gain of 10V/V.

H&H give the gain = -Rc/Re=-10V/V, but I am wondering if this is the "true" expression for the gain and how this circuit should be realized in PSpice (will attach pictures tomorrow when I have access to Pspice)....I am figuring already that PSpice does not report a gain of 10 but rather around 10, perhaps 9.5 or something.

Can someone recommend a transistor for this model? I see that VB=1.6 makes my Q-point (Ic,Vce)=(1mA,9V) (I think for an assumed hfe=100), but I am not sure how to implement in Pspice (i.e do I have a "bare" npn transistor with only the parameter hfe=100 or do I use a complete model like the 2N2222?)

Many thanks for your help.

JT
 

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t_n_k

Joined Mar 6, 2009
5,455
I would have .....

Av=-βRc/[(1+β)(Re+re)]

where re=26/(Ie_dc mA)

If β is sufficiently large

Av=-Rc/(re+Re) will do.

If Ve=1V then Ie_dc = 1mA and re=26 ohms

So the gain would be closer to Av=-10,000/(1026)=9.75 (neglecting small effect of beta)
 
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Thread Starter

johnnyturbo

Joined Feb 20, 2010
6
t_n_k , thanks very much for your response.

Attached is my amp schematic and its frequency response from PSpice.

t_n_k, I am trying to achieve exactly 10V/V gain, so I added the re that I calculated (which I did from re=(β/β+1)*(VT/IC) where VT=25.87mV and Ic=1mA ideally) to the collector resistance to account for this...I also forced β=150 and Vje=Vjc=0.7 so that my bias resistors could make VB=1.7 (I realize the resistor values are not available in this precision)....

Can someone explain the weird rolloff on my frequency response? Does this have something to do with my choice of capacitor? Is it okay to change PSpice transistor values like I did above to make it more "ideal"? I am basically trying to show the differences in a hand calculation where I assume Ic=1mA, Vbe=0.7, β=150 compared to the PSpice simulation of this circuit.

Thanks very much - I appreciate any comments.

JT
 

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t_n_k

Joined Mar 6, 2009
5,455
The low frequency roll-off will be due to your C4 value of 0.1uF in association with the amplifier input resistance. With β=150 the amplifier Rin (ac) would be about 8.6kΩ. The lower 3dB point would occur somewhere around the frequency at which C4 reactance is 8.6kΩ. That would be around 185 Hz.

The high frequency roll off is due to the transistor's decreasing effective hfe (β) value as frequency increases. The 2N2222 transition frequency (where hfe=1) is around 300MHz. Probably should include Miller Effect in the high frequency gain degradation as well. I'm not sure which is more significant in this particular case.
 
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Thread Starter

johnnyturbo

Joined Feb 20, 2010
6
t_n_k, thanks very much for your help - I now understand this circuit better.

I still have some lingering doubts and questions, so I would greatly appreciate anyone's comments.

Attached is my latest amp and its frequency response. I have my gain near 10.0 where I want it to be, but I am now confused about the biasing and some notions of negative feedback with this circuit.

With regards to the negative feedback of this circuit, can someone explain this in terms of the usual feedback diagram attached below? I think the transistor gm is equal to "A openloop" and the total resistance in the emitter is "β" in this diagram, but I am not sure and would appreciate your interpretation...

I set up the bias transistors R3 and R4 to get Vb=1.75. Since Ve=Vb-0.75 (0.75 is the forward drop in PSpice for the 2N2222), I should have Ie=Ve/Re=1/1=1mA=Ic (since Ie=Ic for large β, which mine is ~163) and so I should see Vc=20-10.4k*1mA=9.6V but PSpice reports 9.138 and similarly I should see Ve=1V but PSpice gives Ve=1.051...I see these numbers are obviously close and result from transistor subtleties, but I am unsure why and which parameters are making this difference - or if I have altogether misunderstood this biasing.

Thanks again for your help, I look forward to your response.

JT
 

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t_n_k

Joined Mar 6, 2009
5,455
Perhaps your estimates (?) for β=163 and / or Vbe=0.75 are off.

Consider the voltage divider bias first.

The maximum divider voltage possible is Vb=(10/114)*20=1.754V.

If you have (as shown in your simulations results) that Ve=1.051V and Vbe=0.75 then Vb=Ve+Vbe=1.8V which exceeds the maximum possible divider voltage of 1.754V.

A Vbe of 0.75 is exceptionally high at such [normally] low base currents - I might expect 0.65V to be more reasonable.

If β=160 and Vbe=0.65 you would get a lot closer to the simulated results.
 
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