Offset Cancellation Input Series Cancellation

Thread Starter

screen1988

Joined Mar 7, 2013
310
What is wrong with my thoughts? I am trying to explain the formula bellow in an other way.

I understand the formula well and how it is derived.
Now I want to try it in other way.
At first(t=0), assume that the voltage across the capacitor is zero.
Vc(0) = 0V
=> Vout(0) = -A (-Vos) = A*Vos.
This output voltage is feeded to the input and C is charged to A*Vos.
Vc(t1) = A*Vos
Now Vout(t1) = -A*(A*Vos - Vos) = -A(A-1)*Vos.
=> Vc(t2) = -A(A-1)*Vos
And here is the voltage across the capacitor C in time:
t = 0: Vc(0) = 0V
t=t1: Vc(t1)= A*Vos V
t=t2: Vc(t2)=-A(A-1)*Vos V
Here is what confuse me.
In the picture formula Vc = A/(A+1) * Vos and it is clear that it is a constant but what I found is a varying voltage in time.
Could you tell me what I am wrong here?
 

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t_n_k

Joined Mar 6, 2009
5,455
The issue here is that there is insufficient information to properly formulate a transient solution. In your scenario the amplifier must instantaneously charge the capacitor from 0V to the known final steady state solution. This would require an amplifier with infinite bandwidth & compliance. To obtain a realistic appreciation of the transient behavior one would have to allow (at least) some output resistance for the amplifier. Under that constraint one could obtain something more meaningful.
 

Thread Starter

screen1988

Joined Mar 7, 2013
310
The issue here is that there is insufficient information to properly formulate a transient solution. In your scenario the amplifier must instantaneously charge the capacitor from 0V to the known final steady state solution. This would require an amplifier with infinite bandwidth & compliance. To obtain a realistic appreciation of the transient behavior one would have to allow (at least) some output resistance for the amplifier. Under that constraint one could obtain something more meaningful.
I am confused.:confused:
Is the formula in the picture correct? And assume that the amplifier has infinite bandwidth & compliance, what I am wrong.
Thanks.
 

t_n_k

Joined Mar 6, 2009
5,455
Yes the formula is correct. Yes the amplifier is presumably considered ideal - albeit with finite gain A.

The solution shown takes no account of how the steady state conditions were reached - it just assumed those conditions are established. End of story.

What are you confused about?
 

Thread Starter

screen1988

Joined Mar 7, 2013
310
Yes the formula is correct. Yes the amplifier is presumably considered ideal - albeit with finite gain A.

The solution shown takes no account of how the steady state conditions were reached - it just assumed those conditions are established. End of story.

What are you confused about?
Assume that all conditions are ideal and the capacitor takes no time to buid up its voltage, then the formula is right.
Now to my part, could you tell me what I am wrong here?
 

t_n_k

Joined Mar 6, 2009
5,455
Assume that all conditions are ideal and the capacitor takes no time to buid up its voltage, then the formula is right.
Now to my part, could you tell me what I am wrong here?
I guess you are wondering why I think your particular reasoning about the time dependence and form of the capacitor voltage transition from 0V to steady state might not be what happens.

Let me take your statement ...

"At first(t=0), assume that the voltage across the capacitor is zero.
Vc(0) = 0V
=> Vout(0) = -A (-Vos) = A*Vos.
This output voltage is feeded to the input and C is charged to A*Vos."

OK - suppose the amplifier output goes instantaneously to A*Vos. This is fed back to the amplifier -ve input (actually in series with Vos) and the capacitor junction in an infinitely short time frame. A capacitor cannot change voltage in an infinitely short time frame. So you have a problem - the amplifier output is supposedly at A*Vos volts but the capacitor is still at zero volts. The proposed circuit behavior therefore is not possible.

To obtain something physically consistent one must provide a means by which at time t=0, the amplifier output can be A*Vos & the capacitor voltage can be at zero. Allowing some finite (non-zero) output resistance for the amplifier is one such means.

Attachment shows how this might look in practice ....
 

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