Actually I wasn't really sure how to read that. So thanks for pointing this out.Supply voltage; 5V (+36 or ±18V)
Then what could the "5V" possibly mean?
It's 36V or +18V and -18V (for a total of 36V).Actually I wasn't really sure how to read that. So thanks for pointing this out.
So are "they" running it at 5V, but the max ratings are (+36V or ±18V)??? If this is right, then which one is the actual max 36V or 18V?
I'm still processing the remainder of these posts. Thanks all.
Ok, I guess I will hook up the remainder of the inputs to positive and ground respectively. Is this necessary for my experiment or is it more something that should be done when I formalize the circuit.and you want to place any comparators you are not using into well defined states..
So I have a picture of something I drew up on graph paper. No judgments please! I'm sure there's a million holes. It's based on the schematic Bertus linked on page 1 of this thread (thanks).Could we PLEASE see a schematic?
I thought I might have been mangled the hi/lo definitions. I get it now.NO!!!!
Take a resistor an connect one end of it to Vcc. Now take your voltmeter and measure the voltage at the other end of the resistor relative to ground. What is the voltage?
When you have a resistor tied to Vcc and the output pin (pin 14), when the output is NOT asserting a LO (which will get you around 0.2V to 0.3V usually), the transistor is turned off, meaning it might as well be disconnected from the output pin, which means that ALL you have is a resistor tied on one side to Vcc and the other side, the side connected to the output pin, that is effectively floating.
Even when the transistor is fully on, there is some resistance in the transistor. After all, it is called a semiconductor.Ok, so where does the 0.3v come from in the OFF state? I thought current can on flow from collector or base to emitter with an npn transistor?
One of the secrets to reading the datasheet is to look at what they say about the test conditions. There will usually be something at the top of the table telling you about conditions that are applicable to all specs in the table unless specifically indicated otherwise, and then each row will usually have additional conditions that only apply to that row.Actually I wasn't really sure how to read that. So thanks for pointing this out.
So are "they" running it at 5V, but the max ratings are (+36V or ±18V)??? If this is right, then which one is the actual max 36V or 18V?
I'm still processing the remainder of these posts. Thanks all.
When the output is LO, this is accomplished by turning the transistor on hard, which places it in saturation. But there is a "saturation voltage" than is needed in order to conduct much current at all and that voltage is in the range of a couple tenths of a volt. As you require the output to sink more current, that voltage will rise, but only slowly.Ok, so where does the 0.3v come from in the OFF state? I thought current can on flow from collector or base to emitter with an npn transistor?
For this part, you can probably get away with leaving them unconnected initially. But it is good practice to do it right from the get go. For one thing, how foolish would you feel spending hours trying to figure out why the circuit is behaving erratically only to finally discover that it is because one of the unused comparators is flailing around causing all kinds of power supply noise that is affecting your phototransistors? Second, there are some parts, such as CMOS logic parts, that can be destroyed by leaving the inputs floating. So, again, just get in the habit of always dealing with it from step one.Ok, I guess I will hook up the remainder of the inputs to positive and ground respectively. Is this necessary for my experiment or is it more something that should be done when I formalize the circuit.
The schematic looks fine. Nice and neat and easy to follow.So I have a picture of something I drew up on graph paper. No judgments please! I'm sure there's a million holes. It's based on the schematic Bertus linked on page 1 of this thread (thanks).
The big thing is that you don't have any path for the current in the phototransistors. The inputs to the comparators are very high impedance inputs and allow essentially zero current.I drew my broad stroke understanding and replaced the LDRs with photo transistors. I was trying to get one step working at a time. So I was trying to hook up the top comparator "output" to the base an npn transistor to activate an LED. Without further ado:
I did the above. I only had 47k and 220k resistors to work with. I used the 47k as the pull up.NO!!!!
Take a resistor an connect one end of it to Vcc. Now take your voltmeter and measure the voltage at the other end of the resistor relative to ground. What is the voltage?
When you have a resistor tied to Vcc and the output pin (pin 14), when the output is NOT asserting a LO (which will get you around 0.2V to 0.3V usually), the transistor is turned off, meaning it might as well be disconnected from the output pin, which means that ALL you have is a resistor tied on one side to Vcc and the other side, the side connected to the output pin, that is effectively floating.
You need to be aware that, with a 3V supply, the input common mode range may only range between 0V and +1.5V. That means that your comparator will not work over the full range of your pots.
UnderstoodFor this part, you can probably get away with leaving them unconnected initially. But it is good practice to do it right from the get go. For one thing, how foolish would you feel spending hours trying to figure out why the circuit is behaving erratically only to finally discover that it is because one of the unused comparators is flailing around causing all kinds of power supply noise that is affecting your phototransistors? Second, there are some parts, such as CMOS logic parts, that can be destroyed by leaving the inputs floating. So, again, just get in the habit of always dealing with it from step one.
This reminds me of the pull up concept. Makes sense. It's probably good I used resistors in my tests.The big thing is that you don't have any path for the current in the phototransistors. The inputs to the comparators are very high impedance inputs and allow essentially zero current.
Put resistors from the emitters to gound on each phototransistor.
You can always put two or three 47kΩ resistors in parallel to get a lower value.I did the above. I only had 47k and 220k resistors to work with. I used the 47k as the pull up.
This is exactly what it has to do with. Once you exceed the spec'ed input common mode range you are operating out-of-spec, which means anything goes. It could blow up, catch fire, give bogus outputs, start a global thermonuclear war, or do exactly what you would like it to do -- all of those are equally valid as far as the specs are concered.Now when I tried to use Vcc for both input resistors, it failed.
220k @ 2.45v on input 3-
47k @ 2.79v on input 3+
47k pull up tied to out
Reading from out to ground = 009.6mv (failed)
Reversed inputs reading = 009.6mv (same although technically this works)
Maybe this has to do with the following quote?
Originally Posted by Ron H
You need to be aware that, with a 3V supply, the input common mode range may only range between 0V and +1.5V. That means that your comparator will not work over the full range of your pots.
I never leave inputs floating without a damn good reason, even on a breadboard. So I recommend you do fix that promptly.WBahn, I know the inputs are largely floating, I'll fix that but I had some questions. Should I leave the remainder of outputs floating or hook them up too? Also should I hook resistors up to the inputs or is bare wire fine?
At almost 80 posts, I guess it belies its original heading of 'Simple Circuit'This has dragged on for many pages and many tweaks to the circuit, which is fine.
by Aaron Carman
by Jake Hertz
by Jake Hertz