hi i really need help on how to derive the equation for the Frequency of Oscillation and the equation for the gain of an RC phase shift Oscillator-Graded Section..
I'd really appreciate it if someone could help me soon
A google search on RC phase shift Oscillator-Graded Section, or a combination of "phase shift oscillator" and "graded section" only produces this thread.
Here's your chance to be instructive to the readership at these forums.
Mancini mentions in this note that the phase shift oscillator without buffers between the RC stages suffers from the fact that each RC stage loads the previous one. This can be overcome somewhat by increasing the impedance level of each successive stage. This is what is meant by "graded section". Grading the impedance levels means that the formula for the oscillation frequency becomes much more complicated. See:
You would think "graded section" would come up in an internet search in association with phase shift oscillator.
Mancini certainly doesn't mention it. His mention of the buffers was to prevent loading, as you have said, and
The buffers prevent the RC sections from loading each other, hence the buffered phase-shift oscillator performs more nearly at the calculated frequency and gain. (emphasis mine)
The only mention of graded sections pertains to "quantum wells" when discussing photodetectors, using the search terms "graded section" and "oscillator". Plenty of results with "graded section" and "photodetector", though.
It's well known that the theoretical gain necessary for oscillation to occur in the circuit of Figure 14 is -29 (assuming the last R/C section isn't loaded). See:
Mancini doesn't mention that, but he does say that "... the gain required to start oscillation is 27..." as though he found this number by breadboarding the circuit and measuring the gain for oscillation. He also says that the gain required for the buffered version to oscillate is 8.
A graded section version would be something like this:
Let the first R/C section (after the opamp) consist of 1k/100nF, the next 10k/10nF, and the third, 100k/1 nF. Now the loading of each section on the previous is substantially reduced. The gain required for oscillation is less than 29, but not as low as 8.
It's an interesting problem to calculate the theoretical required gain for this "graded section" circuit (and to make it easier, assume the last stage isn't loaded by a 55.2k resistor, but rather sees the extremely high input impedance of perhaps a FET input amplifier).
Even though Mancini says "...the buffered phase shift oscillator performs more nearly at the calculated frequency and gain.", there's no reason for the unbuffered circuit to not oscillate at the calculated frequency, provided the calculations are done correctly. And in particular, the loading effect of the 55.2k resistor can't be left out of the calculations.
Had he preceded the 55.2k resistor with a unity gain FET input buffer, he would have avoided the loading effect and the oscillation frequency should be very close to the calculated value.