Hi! I am trying to design a calculator circuit that adds 2 four bit 2's complement binary number as its input that outputs an 8 bit 2's complement number when the control bit comes 01.

Here's what I have done so far using a software called Logisim. I am really stuck when I found out that I cannot put the other 4 output buttons(colored in blue in my full adder. I am stumped on how to approach this problem now.

I have tested a few 2's complement and got the output I wanted and some 2's complement number that did not go so well like (having 0100 as the first input and 0110 as the second input did not give me 1010 but gave me 1011.

 

I can't make heads or tails out of your circuit because the pins on your FAs aren't labeled.

On the top going from Left to Right, is it: Input1, Input2, and Carry-In?

On the bottom, going from Left to Right, is it: Carry-Out, Sum?

Regardless of what it is (but PLEASE tell us what it is!), describe your design and how it accomplishes what it is supposed to do.

The first thing to do is explain how adding two 4-bit numbers can result in an 8-bit number? If it can't, then how many bits can it result in and what can you do to turn it into an 8-bit number?

 

I can't make heads or tails out of your circuit because the pins on you FAs are labeled.

On the top going from Left to Right, is it: Input1, Input2, and Carry-In?

On the bottom, going from Left to Right, is it: Carry-Out, Sum?

Regardless of what it is (but PLEASE tell us what it is!), describe your design and how it accomplishes what it is supposed to do.

The first thing to do is explain how adding two 4-bit numbers can result in an 8-bit number? If it can't, then how many bits can it result in and what can you do to turn it into an 8-bit number?

Hi WBahn. FA is a Full Adder. A0 is Input 0 of A. B0 is Input 0 of B. Same idea applies for A1,A2,A3,B1,B2,B3. I am trying to add 2 inputs of 4 bit 2's complement binary number to get an output of a 8 bit 2's complement number. C0 and C1 are control bits. If my control is 01 meaning C0 is 0 and C1 is 1, my circuit is suppose to be able to compute A + B. The bottom from right to left is sum and carry out. If the output is positive pad 0's before the number using sign extension. if the output is negative pad the 1's before the number using sign extension. My apologies for any previous confusion. Check this new picture, this is the new circuit.

 

Hi WBahn. FA is just a Full Adder. A0 is Input 0 of A. B0 is Input 0 of B. Same idea applies for A1,A2,A3,B1,B2,B3. I am trying add 2 inputs of 4 bit 2's complement to get an output of a 8 bit 2's complement. If the output is positive pad 0's before the number using sign extension. if the output is negative pad the 1's before the number using sign extension. My apologies for any previous confusion. Check this new picture, this is the new circuit.

That's much better.

It sounds like you have two control bits. Yet you have C0 tied to an output from one of the FAs. Which is it? If it is an output from the circuit, what is it supposed to mean when it is a 0 and when it is a 1?

What is C1 supposed to mean? Saying, "... when the control bit comes from C1" is basically meaningless. The obvious response is, "As opposed to when it comes from someplace else?" As shown, the control bit is ALWAYS coming from C1! Now, the control bit may have a value of 0 or a value of 1, which is what I suspect you were referring to. So be specific. What is the circuit supposed to do when C1 is 0 and what is it supposed to do when C1 is 1?

On an FA, the three inputs are symmetric in that it doesn't matter which signal you apply to which input (well, from a timing and propagation delay standpoint, it matters, but not from a static logic standpoint). None-the-less, it is very sloppy and confusing not to connect them consistently.

Your carry-out from a previous stage consistently goes into the right-most input on the top of the FAs, arguing that this is the Cin input. Yet your right-most FA has A0 going into it. It will be much cleaner if you put the signal from A[3:0] into the left-most port on the top of each FA, the signal from B[0] into the middle port, and use the right-most port as Cin.

 

That's much better.

It sounds like you have two control bits. Yet you have C0 tied to an output from one of the FAs. Which is it? If it is an output from the circuit, what is it supposed to mean when it is a 0 and when it is a 1?

What is C1 supposed to mean? Saying, "... when the control bit comes from C1" is basically meaningless. The obvious response is, "As opposed to when it comes from someplace else?" As shown, the control bit is ALWAYS coming from C1! Now, the control bit may have a value of 0 or a value of 1, which is what I suspect you were referring to. So be specific. What is the circuit supposed to do when C1 is 0 and what is it supposed to do when C1 is 1?

On an FA, the three inputs are symmetric in that it doesn't matter which signal you apply to which input (well, from a timing and propagation delay standpoint, it matters, but not from a static logic standpoint). None-the-less, it is very sloppy and confusing not to connect them consistently.

Your carry-out from a previous stage consistently goes into the right-most input on the top of the FAs, arguing that this is the Cin input. Yet your right-most FA has A0 going into it. It will be much cleaner if you put the signal from A[3:0] into the left-most port on the top of each FA, the signal from B[0] into the middle port, and use the right-most port as Cin.

I am suppose to have a 2 bit control. My instructions to create the calculator circuit is as follows:



Apologies I should probably have posted these instructions initially. Yes I do have 2 control bit. My circuit is suppose to function differently based on control bit is 00,01,10,11. The reasons why I tied C0 to the output of the FA is to use sign extension( pad the 2's complement number result with 0's when it is a positive 2's complement number result) when the control bit is 00. Here's my new circuit. Hope my logic is correct.

 

Here's the clean and new Circuit based on WBahn's feedback:

 

The layout is certainly much cleaner, but it looks like you are almost guessing at things, instead of designing something.

You have the upper three bits of the output tied to one of the control inputs. But don't the values of the upper three bits depend on the result of the operation?

Keep in mind what the problem states the purpose of the control bits is.

If the control bits <C1, C0> are:
<0, 0> - the entire 8-bit output is supposed to be 0.
<0, 1> - the 8-bit sum of A and B, namely A+B.
<1, 0> - the 8-bit difference of A and B, namely A-B.
<1, 1> - the 8-bit product of A and B, namely A*B.

So, for now, forget about the control bits. Make four different circuits (keeping them as similar as possible), that perform these four different functions.

Start off with a circuit that performs A+B. What does it look like? You basically had it a couple of diagrams ago.

Now make a circuit that does A-B? If all you have is a circuit that can add, how do you mathematically convert A-B into the sum of two things?

Work on those and then we can proceed once we have those two done.

 

The layout is certainly much cleaner, but it looks like you are almost guessing at things, instead of designing something.

You have the upper three bits of the output tied to one of the control inputs. But don't the values of the upper three bits depend on the result of the operation?

Keep in mind what the problem states the purpose of the control bits is.

If the control bits <C1, C0> are:
<0, 0> - the entire 8-bit output is supposed to be 0.
<0, 1> - the 8-bit sum of A and B, namely A+B.
<1, 0> - the 8-bit difference of A and B, namely A-B.
<1, 1> - the 8-bit product of A and B, namely A*B.

So, for now, forget about the control bits. Make four different circuits (keeping them as similar as possible), that perform these four different functions.

Start off with a circuit that performs A+B. What does it look like? You basically had it a couple of diagrams ago.

Now make a circuit that does A-B? If all you have is a circuit that can add, how do you mathematically convert A-B into the sum of two things?

Work on those and then we can proceed once we have those two done.

Well that part is easy A - B is the same as A + -B. I will work on the diagram you suggested and post them here.

Here's A + B diagram I decided to keep this look since I seem to see the inputs better like this =] By the way, I really appreciate your help and time guiding me with suggestion in this circuit design process.

 

But now you have in input signal (C0) tied directly do the output of one of the FAs. What is the value of this signal if you input a 0 to C0 but the that output of the FA is a 1? Or the other way around? Never connect two driven logic signals together unless, by design, one signal is capable to overdrive the other.

You are feeding C1 into one of the unputs to the lsb's FA. Why?

 

But now you have in input signal (C0) tied directly do the output of one of the FAs. What is the value of this signal if you input a 0 to C0 but the that output of the FA is a 1? Or the other way around? Never connect two driven logic signals together unless, by design, one signal is capable to overdrive the other.

You are feeding C1 into one of the unputs to the lsb's FA. Why?

I have finished working on the two circuits: addition and subtraction! Hopefully it is correct.

I am feeding the C1 to the input of the rightmost FA so my circuit can do addition. The other reason is also I would get Logisim errors. C0 is tied directly to the 4 left most output bits because I have to put it with 0's when the control is 0 and it seems to be the only design choice.

Oh I see, I am getting errors with the C0 being tied directly to the leftmost 4 output bits.

 

Both circuits: add and sub are done! Any mistakes?

 

Both circuits: add and sub are done! Any mistakes?

Well, you tell me.

Your circuit is supposedly adding A and B.

A = 1111
B = 0001 +
-------------
O = 10000

Does this match the output you are showing?

Again, explain WHY you are feeding C1 into the rightmost lsb? Why are you adding the value of the control bit to the two inputs that you are supposed to be adding together.

If not, the answer to your question is yes, there are mistakes.

Again, you tell me.

Your circuit is supposedly subtracting B from A.

A = 0110
B = 0001 -
-------------
O = 0101

Does this match the output you are showing?

Again, if not, the answer to your question is yes, there are mistakes.


So, please, forget about the C0 and C1. Don't use them, delete them, erase them, cover them up, whatever it takes. Draw a circuit that does nothing but adds two values, A and B.

Now, I think that part of the problem (and I didn't spot this earlier) is that if you are going to do two's complement arithmetic, you really need for all of the quantities to be represented in the same width. So you need to convert your 4-bit inputs into appropriate 8-bit inputs and then put them through an 8-bit adder. So do that -- and only that -- and see if you can get it working properly before we move on.

 

But now you have in input signal (C0) tied directly do the output of one of the FAs. What is the value of this signal if you input a 0 to C0 but the that output of the FA is a 1? Or the other way around? Never connect two driven logic signals together unless, by design, one signal is capable to overdrive the other.

You are feeding C1 into one of the unputs to the lsb's FA. Why?

Oh I see what you mean! The C1 is messing up my calculation I am suppose to be using a carry in and hardcode a zero constant instead.

the calculation works but I cannot figure out how to perform sign extension on the result

 

You are making progress. See how breaking the problem up into smaller peices makes it easier to focus on what needs to happen to make the small peice work without getting all bogged down by higher level details?

You might recall that whenever you perform arithmetic operations on binary representation, particularly signed representations, you must take care to do them all in the same width. The reason is that the weighting of different bits is different depending on the width in use.

Doing sign extension to convert, say, a 6-bit number 2's complement representation to a 16-bit 2's complement representation is trivial - you simply copy the msb to all of the new positions that weren't in the original one.

But it is much more complicated to do this with the output of a circuit that performs arithmetic on two 6-bit numbers and is intended to produce a 6-bit result because that circuit can produce patterns that are overflows for a 6-bit representations but are not overflows for a 7-bit or greater representation. Worse, your 6-bit arithmetic module (say an adder) can produce the same pattern (even at 7-bits taking the carry-out into account) and that pattern has multiple meanings. If you are trimming it to 6-bits, then either the 6-bit result is value by simply discarding the 7th bit or it isn't (meaning an overflow has resulted) and you can detect that through some simple examinations. But if you are going to convert the result to more bits, you need to exersize extreme caution because the 7-bit result is NOT always a valid 2's comp result and the overflow results are NOT overflows anymore.

Let's consider your 4-bit situation:

In 2's comp, let's work some examples and see the 5-bit result.

A|B|Y=A+B|Base 10|Valid 4-bit|Valid 5-bit
1111|1111|11110|(-1)+(-1)=(-2)|Y|Y
1001|0101|01110|(-7)+(+6)=(-2)|Y|N
0111|0111|01110|(+7)+(+7)=(+14)|N|Y

See how the last two produce the same output pattern but whether they are valid or not depends on whether you are constraining them back to a 4-bit result or choosing to keep all five bits. But, in particular, note that you can't just keep all five bits and be guaranteed of a result.

Instead, what makes the most sense is to convert the original 4-bit inputs to full 8-bit values and then perform 8-bit arithmetic on them, keeping the result as an 8-bit result.

 

You are making progress. See how breaking the problem up into smaller peices makes it easier to focus on what needs to happen to make the small peice work without getting all bogged down by higher level details?

You might recall that whenever you perform arithmetic operations on binary representation, particularly signed representations, you must take care to do them all in the same width. The reason is that the weighting of different bits is different depending on the width in use.

Doing sign extension to convert, say, a 6-bit number 2's complement representation to a 16-bit 2's complement representation is trivial - you simply copy the msb to all of the new positions that weren't in the original one.

But it is much more complicated to do this with the output of a circuit that performs arithmetic on two 6-bit numbers and is intended to produce a 6-bit result because that circuit can produce patterns that are overflows for a 6-bit representations but are not overflows for a 7-bit or greater representation. Worse, your 6-bit arithmetic module (say an adder) can produce the same pattern (even at 7-bits taking the carry-out into account) and that pattern has multiple meanings. If you are trimming it to 6-bits, then either the 6-bit result is value by simply discarding the 7th bit or it isn't (meaning an overflow has resulted) and you can detect that through some simple examinations. But if you are going to convert the result to more bits, you need to exersize extreme caution because the 7-bit result is NOT always a valid 2's comp result and the overflow results are NOT overflows anymore.

Let's consider your 4-bit situation:

In 2's comp, let's work some examples and see the 5-bit result.

A|B|Y=A+B|Base 10|Valid 4-bit|Valid 5-bit
1111|1111|11110|(-1)+(-1)=(-2)|Y|Y
1001|0101|01110|(-7)+(+6)=(-2)|Y|N
0111|0111|01110|(+7)+(+7)=(+14)|N|Y

See how the last two produce the same output pattern but whether they are valid or not depends on whether you are constraining them back to a 4-bit result or choosing to keep all five bits. But, in particular, note that you can't just keep all five bits and be guaranteed of a result.

Instead, what makes the most sense is to convert the original 4-bit inputs to full 8-bit values and then perform 8-bit arithmetic on them, keeping the result as an 8-bit result.

If I need to convert 4 bit input to 8 bits then my input needs to be 8 bits instead of 4 bits, right? So you are recommending I sign extend both inputs to 8 bits and then add them? Doesn't overflow always happen when i am adding binary numbers with the same sign bit? so won't I get overflow regardless of my design?
I was trying to figure out A - B which means A + -B and got the circuit to somewhat work. But something does not seem right. The fourth bit sometimes produce a different result when I add 2's complement binary numbers

 

If I need to convert 4 bit input to 8 bits then my input needs to be 8 bits instead of 4 bits, right?

You have the right idea, but the phrasing above needs work. If you need to convert a 4-bit input to something, that can't ever mean that you need something other than 4-bits, because then you wouldn't have a 4-bit input that needed converting to something. What you said next made it evident to me that you were trying to say the right thing, so I'm only pointing it out so that you can reflect on it and use it to improve your phrasing in the future -- it's an art that you will forever be improving and almost certainly never master.

So you are recommending I sign extend both inputs to 8 bits and then add them?

Yes.

Doesn't overflow always happen when i am adding binary numbers with the same sign bit? so won't I get overflow regardless of my design?

Again, I know what you mean to say, but what you actually said is not correct. Adding to positive 2's complement values does not result in overflow (not the kind you are thinking about).

Now, by "overflow" you are talking about the basic meaning of overflow you can get when adding two fixed-width straight binary numbers (i.e., unsigned arithmetic),, namely the carry-out of the final adder stage being HI. That's not what true overflow means, but we'll stick with that for now.

When you add two N-bit two's complement values and keep an N-bit two's complement result, then when overflow happens, the overflow bit is the (N+1)th bit and does not become part of the result -- the best you can do with it is test it to see if an actual overflow occured and take some action as a result.

So when you add two negative numbers, yes, you get an overflow, but it has no effect on the result because it is not within the field of bits you are using to represent your result. You ignore it because what counts is the Nth bit of the result (i.e., the sign bit) and whether it is consistent with adding two negative numbers.

But when you are adding two N-bit two's complement numbers and keeping more than N-bits in the result, then you have a problem because the sign bit of the result is not the msb of the result. Now the sign bit (and the overflow bit) are embedded in the middle of your wider representation.

The bottom line is, be first converting your input values to the same width that your output is going to be and doing the arithmetic at that width, the carry that results will be outside the range of bits you are keeping, so it will get thrown away as it should, and the sign bit will be in the spot where it belongs.

I was trying to figure out A - B which means A + -B and got the circuit to somewhat work. But something does not seem right. The fourth bit sometimes produce a different result when I add 2's complement binary numbers

It is exhibiting precisely the behavior I have been trying to tell you about. Look at what you would have if you were just keeping 4-bits. You would have 0-0=0 because that 1 in the fifth bit would get thrown away. But when you try to keep it as part of a wider representation it screws up the results. Why? Because when you changed the width you changed the weighting on those bits and you can't just shove bits that meant one thing into bits that mean something else.

Do yourself a favor. Just take a chance and try it! Convert your two 4-bit inputs to 8-bit via sign-extension and then bring the two 8-bit results into an 8-bit adder and see what happens, both with A+B and A-B.

 

You have the right idea, but the phrasing above needs work. If you need to convert a 4-bit input to something, that can't ever mean that you need something other than 4-bits, because then you wouldn't have a 4-bit input that needed converting to something. What you said next made it evident to me that you were trying to say the right thing, so I'm only pointing it out so that you can reflect on it and use it to improve your phrasing in the future -- it's an art that you will forever be improving and almost certainly never master.



Yes.



Again, I know what you mean to say, but what you actually said is not correct. Adding to positive 2's complement values does not result in overflow (not the kind you are thinking about).

Now, by "overflow" you are talking about the basic meaning of overflow you can get when adding two fixed-width straight binary numbers (i.e., unsigned arithmetic),, namely the carry-out of the final adder stage being HI. That's not what true overflow means, but we'll stick with that for now.

When you add two N-bit two's complement values and keep an N-bit two's complement result, then when overflow happens, the overflow bit is the (N+1)th bit and does not become part of the result -- the best you can do with it is test it to see if an actual overflow occured and take some action as a result.

So when you add two negative numbers, yes, you get an overflow, but it has no effect on the result because it is not within the field of bits you are using to represent your result. You ignore it because what counts is the Nth bit of the result (i.e., the sign bit) and whether it is consistent with adding two negative numbers.

But when you are adding two N-bit two's complement numbers and keeping more than N-bits in the result, then you have a problem because the sign bit of the result is not the msb of the result. Now the sign bit (and the overflow bit) are embedded in the middle of your wider representation.

The bottom line is, be first converting your input values to the same width that your output is going to be and doing the arithmetic at that width, the carry that results will be outside the range of bits you are keeping, so it will get thrown away as it should, and the sign bit will be in the spot where it belongs.



It is exhibiting precisely the behavior I have been trying to tell you about. Look at what you would have if you were just keeping 4-bits. You would have 0-0=0 because that 1 in the fifth bit would get thrown away. But when you try to keep it as part of a wider representation it screws up the results. Why? Because when you changed the width you changed the weighting on those bits and you can't just shove bits that meant one thing into bits that mean something else.

Do yourself a favor. Just take a chance and try it! Convert your two 4-bit inputs to 8-bit via sign-extension and then bring the two 8-bit results into an 8-bit adder and see what happens, both with A+B and A-B.

here's A+B with sign extension.
it looks good.

A-B with sign extension. it looks good too.

 

Getting closer, but still not quite there. You need your sign-extension to be automatic. Also, note that you have NOT sign extended B in your example and, since the A and B (4-bit) inputs are both negative, you KNOW that the result is negative. Yet your final 8-bit result is positive.

Remember, you only have 4-bits of A and 4-bits of B coming in. Your 8-bit versions of A and B have to produces using only the 4-bit inputs.

 

Getting closer, but still not quite there. You need your sign-extension to be automatic. Also, note that you have NOT sign extended B in your example and, since the A and B (4-bit) inputs are both negative, you KNOW that the result is negative. Yet your final 8-bit result is positive.

Remember, you only have 4-bits of A and 4-bits of B coming in. Your 8-bit versions of A and B have to produces using only the 4-bit inputs.

The top one is A+B. The bottom one is A - B. =]

What does HI mean, you mention " final adder stage being HI"?

Hmm I never thought building circuits could be very thought-provoking! I really appreciate your daily feedback and hints/suggestions. You helped my brain grow from struggling with building simple circuits to actually thinking about it in a visually way.

I do want to get started on another circuit which is suppose to multiply the 4 bit 2's complement number. The reason is the circuits have a deadline. I know I need sign extension, Full Adder for adding the primary products to get the final product as an answer, 1 bit ALU for multiplying and 2 bit and 4 bit Multiplexer for decision making if I am correct. I will show you the multiplication circuit in a moment. It's probably not correct but I will post it up here as I am going to work on it now. I have a feeling the multiplication circuit is going to be different than the subtraction and addition circuit by a long shot. =]

The circuits I posted so far addition and subtraction both with sign extension. The problem I'm not sure how to activate these circuits when the proper control line lines up to perform the addition and subtraction. I'm still figuring how the multiplexer and ALU will activate addition and subtraction circuits.

2 bit mux

4 bit mux

 

The top one is A+B. The bottom one is A - B. =]

What does HI mean, you mention " final adder stage being HI"?

HI, True, and 1 are all pretty much synonyms. When talking about pure logic, True/False (or T/F) are probably the best terms to use. When talking about actual logic circuits, HI/LO are probably the best (and refer to the two possible voltage values of the circuit, namely the HIgher of the two and the LOwer of the two). When talking about arithmetic circuits, 1/0 are probably best.

Hmm I never thought building circuits could be very thought-provoking! I really appreciate your daily feedback and hints/suggestions. You helped my brain grow from struggling with building simple circuits to actually thinking about it in a visually way.

Thanks, and not a problem. That's why I'm leading you along but letting you struggle to actually get there. That's how you learn the best because you learn in a way that makes sense to you.

I do want to get started on another circuit which is suppose to multiply the 4 bit 2's complement number. The reason is the circuits have a deadline. I know I need sign extension, Full Adder for adding the primary products to get the final product as an answer, 1 bit ALU for multiplying and 2 bit and 4 bit Multiplexer for decision making if I am correct. I will show you the multiplication circuit in a moment. It's probably not correct but I will post it up here as I am going to work on it now. I have a feeling the multiplication circuit is going to be different than the subtraction and addition circuit by a long shot. =]

The circuits I posted so far addition and subtraction both with sign extension. The problem I'm not sure how to activate these circuits when the proper control line lines up to perform the addition and subtraction. I'm still figuring how the multiplexer and ALU will activate addition and subtraction circuits.

2 bit mux

4 bit mux

Your last circuit did have the sign extender done correctly. The idea you want to have is the notion that you bring a 4-bit two's complement value into a box and take out from that box an 8-bit two's complement value that you then take to your adder. What goes on inside that box? Not that you don't need any components in that box; it can be done just with how you wire the inputs to the outputs.

Now, think of what is different between your A+B and A-B circuits. It would appeat that you need a circuit that uses a control input in order to either pass a value through unchanged or to invert the value, based on the state of the control input. So draw a truth table for all of the possible combinations of the control input and the value (a 1-bit value) and what the 1-bit value should be for each case. Does this logic table look familiar to you?

For the multiplier, walk through the steps you would use to multiply two 4-bit values together. Now see if you can determine the associated logic functions that happen at each step. Note that there are lots of ways to implement an adder, but your goal is to come up an just one way that works -- you can worry about efficiency and elegance later.