Hello,

Me and my group are doing a design project right now and we are a little stuck on the question, ok very stuck. The question is to:

Design a multi-stage audio amplifier for delivering an average power of 400 mW to a 16 Ohm speaker from a microphone that produces a 10 mV peak sinusoidal signal and has a source resistance of 1 kW. Use standard NPN QN2222 for your design. Analyze the frequency response for the amplifier as well. Design such that the upper 3 dB frequency is at least 100 kHz, and lower cutoff frequency below 20 Hz. Input resistance needs to be atleast 10 kΩ.

We were thinking of making a 2 stage amp but now we are rethinking the idea and going for a 3 stage. We are not very sure on where to start so any help would be very appreciated.
Thanks alot.

 

What power supply voltage or voltages are you permitted to use?

 

Consider the minimum supply voltage:

From P = Vpp^2/(8R) with R 16 ohms and P 400 mW, you need about 8 volts of supply voltage. Make it 12 or 15 volts for breathing room.

To get 10k input resistance min. use a follower at the input. This will cause slight attenuation.

With Vpp minimum at 7.15 volts and an input of 10mV, you need an overall voltage gain of 715. The output stage to drive 16 ohms will probably be a differential pair and so it's attenuation added to the input follower's attenuation has to be accounted for. So, to be safe, design your voltage stage for a gain of about 1000 volts per volt.

If you build this in the lab on a breadboard you'll need a dummy load. Use at least a 1 Watt 16 ohm resistor. If you can't find that use two 8 ohm power resisters in series.

The upper frequency roll off of 100kHz min may mean using more than one transistor for voltage gain. But be careful of nonlinear distortion in this case.

 

Thanks for the help.

We are allowed to use any power supply we would like.

We are using three stages now and we are getting a gain of about 3k but the signal we are getting is very clipped. The three stages we are using are cc cc ce. Is there any general form we can use to find out all the components to make it not as clipped?

 

Your use of a cc input stage is right. The output stage should be a complimentary pair (I absent-mindedly said differential pair in my post above.) Build both and get them working. Having the output stage up and working means you know exactly the input resistance to your output stage (By computation and especially by measurement). Now build the middle. It should be one or two ce stages. To avoid clipping the signal swing must be at least 8 volts. This means Vc=Vcc-RcIc is greater than or equal to 4 volts, and Ve is less than or equal to 0 volts.

But that's a tight squeeze. Using a power supply of 15 volts make Vc be about 8 volts (giving the upper part of the signal 15-8=7 volts swing.) If you use a partially bypassed emitter resistor make the Ve seen by the signal is at least 2 volts (giving the lower half of the signal Vc-Ve=6 volts for swing). In this case you'll have room for a Vpp of 10 volts, which is plenty.

 

Your design will be more difficult if you can only use one type of small NPN transistor. A complementary stage would require at least one PNP device as well.

Are you sure about the restriction to using QN2222 (similar to 2N2222?) - no chance of getting a 2N2907? See datasheet:

http://www.st.com/stonline/books/pdf/docs/9037.pdf

These transistors are a bit small for a power amplifier anyway, but OK for 0.4W into 16Ω, I suppose.

 

If you can't use a PNP then you can't make a complimentary pair be your output. In this case use two NPNs in a Darlington Pair configuration as an emitter follower. The extra transistor here is to increase the input resistance to your output stage.