Im stuck on this problem and have been trying to figure it out...could someone show me what to do...any help appreciated

Fig. 3 shows a feedback‐bias circuit. You are provided a 6‐V power supply and NMOS transistor(VT=1.2 V, K=1.6 mA/V2). Provide a design which will bias the NMOS transistor at ID= 2mA, with VDS large enough to allow saturation operation for a 2‐V negative signal swing at the drain. Use 22 Mohm as the largest resistor in the feedback‐bias network. What are the values for RD, RG1,RG2 ?

//work

Vds= 6-Rd(Id+I) Set Rg1 = 22M ohm

Id=k(Vgs-Vt)^2

.002 = .0016/2(Vgs-1.2)^2 =>Vgs=2.32V

Vgs=Vds(22M/(22M + Rg2))

I=Vds/Rg1+Rg2

 

Vgs=Vds(22M/(22M + Rg2))

According to the figure this equation should be changed to
Vgs=Vds(Rg2/(22M + Rg2))
Additionally try to use the "2‐V negative signal swing at the drain".
I think the drain voltage must be set to a value between the power supply and 2V (3.5V for example). That would give you Vds => you have now 3 equations with 3 variables => can solve.

 

thanks for the reply..