HI iam a jst a beginner and im studying for my final exam and i really need help on designing a MOD 15 asynchronus up counter.
i had the 4 JK FF connected with the external clock input for FFO and it complimentary output (Q') will be the input and the question lies on which FF sould the NAND gate be inputed from....

 

You'll find that posting a schematic with your question will generally get you useful replies.

Failure to include a schematic will only result in delays and more questions.