microcontroller programming in keil software

Discussion in 'Embedded Systems and Microcontrollers' started by soniya, Feb 5, 2014.

  1. soniya

    Thread Starter New Member

    Jul 24, 2013
    Hello sir/Mam ,
    As i am running the below program in keil μvision3 error 65 occurs with massage access violation at C:0x0028 :no 'execution / read' permission .

    The program is to copy the the 8-bit data stored in internal RAM location 27h to external memory location 30h.it does not show th 33h data into @R0 register.

    org 0000h
    ljmp start
    org 0020h
    start:mov 27h,#33h
    mov a,27h
    mov @r0,30h
    movx @r0,a
    Please help to solve above program
  2. soniya

    Thread Starter New Member

    Jul 24, 2013
    as clock frequency of microcontroller 8051 is 12MHZ but we considering 11.059MHZ what is the logic behind this
    Please help me by answering this ?
  3. Ian Rogers


    Dec 12, 2012
    11.059Mhz is a good base for a UART divisor.... All baud rates with the smallest of error...

    For instance.. 9600baud on a 12Meg Xtal will give about 0.9% error where as 11.059Mhz doesn't... (Might be a bit more than 0.9%)
  4. Ian Rogers


    Dec 12, 2012
    To answer your code qusetion ( completely missed that )

    Code ( (Unknown Language)):
    2.    org 0000h
    3.    ljmp start
    4. org 0020h
    5. start:
    6.    mov 27h,#33h
    7.    mov a,27h
    8.    mov r0,#30h ; (Your Xternal data location is an actual number... Preseeded with '#'
    9.    movx @r0,a
    10. end
    Last edited: Feb 6, 2014
  5. Papabravo


    Feb 24, 2006
    In the original code fragment R0 is never initialized. Did you mean to write:

    mov r0,#30h

    to put the value 30h into R0 prior to using it as an indirect pointer in the movx instruction. In a real 8051 part you need to understand that the contents of port 2 (P2) will be output on the high order address lines [A15..A8] during the movx @r0,a instruction. The contents of R0 will appear on [AD7..AD0] and be latched by the falling edge of ALE*. Then [AD7..AD0] will switch to the content of the accumulator (ACC), and WR* will go low indicating a write operation. The data on [AD7..AD0] will be latched into the external device by the rising edge of WR* or WR* OR'ed with CE* depending on the device.