MECHATRONICS question!

Thread Starter

MaxHeadRoom

Joined Jul 18, 2013
25,016
It should increase the torque with load though, if it operates per the description.
I am just figuring the easiest way to convert, most is fairly obvious, but some of the C operations I am not familiar with.
Max.
 

Thread Starter

MaxHeadRoom

Joined Jul 18, 2013
25,016
Unfortunately I am thinking the operative word is 'Was' very good, as he dissapeared from sight around 2013 on all forums he contributed to.
Max.
 

AlbertHall

Joined Jun 4, 2014
11,961
Build for debugging, then from the menu, window, debugging, disassembly.
If you are using the free XC8 then it won't make much sense as it will have deliberate 'extras' in to make the paid version optimisations seem better :rolleyes:
 

Thread Starter

MaxHeadRoom

Joined Jul 18, 2013
25,016
What would the assembly version of this be?
Max.

C:
;  2. updates reference freq generator, records its position
  bres += 102400;                 ; add nS per interrupt period (512 insts * 200nS)
  if(bres >= MOTOR_PULSE_PERIOD)  ; if reached a new reference step
  {
    bres -= MOTOR_PULSE_PERIOD;
    rpos++;                       ; record new xtal-locked reference position
  }
 

Thread Starter

MaxHeadRoom

Joined Jul 18, 2013
25,016
unsigned long bres; // bresenham accumulator used to make ref frequency
unsigned char rpos; // reference position of xtal based freq
Thanks
Max.
 

AlbertHall

Joined Jun 4, 2014
11,961
This is what XC8 (free version) produces and it is virtually incomprehensible. The compiler has optimised out rpos and reused one of my variables, Parity, instead (I put this code in a program I am working on at the moment). Notice the code at 0x260 and 0x 261 which just wastes time. There will be lots more like that in there if you care to analyse it. I think it would be much easier to do it from scratch.
[EDIT] I just noticed that it has also used my Temp variable!

Code:
!    unsigned long bres=0;
0x20F: MOVLW 0x0
0x210: BSF STATUS, 0x5
0x211: BCF STATUS, 0x6
0x212: MOVWF 0x4A
0x213: MOVLW 0x0
0x214: MOVWF 0x49
0x215: MOVLW 0x0
0x216: MOVWF 0x48
0x217: MOVLW 0x0
0x218: MOVWF Temp
!    unsigned char rpos=0;
0x219: CLRF Parity
!    const unsigned long MOTOR_PULSE_PERIOD = 100;
!  
!    //  2. updates reference freq generator, records its position
!  bres += 102400;                 //; add nS per interrupt period (512 insts * 200nS)
0x21A: MOVLW 0x0
0x21B: ADDWF Temp, F
0x21C: MOVLW 0x90
0x21D: BTFSC STATUS, 0x0
0x21E: MOVLW 0x91
0x21F: ADDWF 0x48, F
0x220: MOVLW 0x1
0x221: BTFSC STATUS, 0x0
0x222: MOVLW 0x2
0x223: ADDWF 0x49, F
0x224: MOVLW 0x0
0x225: BTFSC STATUS, 0x0
0x226: MOVLW 0x1
0x227: ADDWF 0x4A, F
!  if(bres >= MOTOR_PULSE_PERIOD)  //; if reached a new reference step
0x228: MOVLW 0x1
0x229: MOVWF FSR
0x22A: CALL 0x42B
0x22B: MOVWF 0x42
0x22C: CALL 0x42B
0x22D: MOVWF 0x43
0x22E: CALL 0x42B
0x22F: MOVWF 0x44
0x230: CALL 0x42B
0x231: MOVWF 0x45
0x232: MOVF 0x45, W
0x233: SUBWF 0x4A, W
0x234: BTFSS STATUS, 0x2
0x235: GOTO 0x240
0x236: MOVF 0x44, W
0x237: SUBWF 0x49, W
0x238: BTFSS STATUS, 0x2
0x239: GOTO 0x240
0x23A: MOVF 0x43, W
0x23B: SUBWF 0x48, W
0x23C: BTFSS STATUS, 0x2
0x23D: GOTO 0x240
0x23E: MOVF 0x42, W
0x23F: SUBWF Temp, W
0x240: BTFSS STATUS, 0x0
0x241: GOTO 0x264
!  {
!    bres -= MOTOR_PULSE_PERIOD;
0x242: MOVLW 0x1
0x243: MOVWF FSR
0x244: CALL 0x42B
0x245: MOVWF 0x42
0x246: CALL 0x42B
0x247: MOVWF 0x43
0x248: CALL 0x42B
0x249: MOVWF 0x44
0x24A: CALL 0x42B
0x24B: MOVWF 0x45
0x24C: MOVF 0x42, W
0x24D: SUBWF Temp, F
0x24E: MOVF 0x43, W
0x24F: BTFSS STATUS, 0x0
0x250: INCFSZ 0x43, W
0x251: GOTO 0x253
0x252: GOTO 0x254
0x253: SUBWF 0x48, F
0x254: MOVF 0x44, W
0x255: BTFSS STATUS, 0x0
0x256: INCFSZ 0x44, W
0x257: GOTO 0x259
0x258: GOTO 0x25A
0x259: SUBWF 0x49, F
0x25A: MOVF 0x45, W
0x25B: BTFSS STATUS, 0x0
0x25C: INCFSZ 0x45, W
0x25D: GOTO 0x25F
0x25E: GOTO 0x260
0x25F: SUBWF 0x4A, F
!    rpos++;                       //; record new xtal-locked reference position
0x260: MOVLW 0x1
0x261: MOVWF 0x42
0x262: MOVF 0x42, W
0x263: ADDWF Parity, F
!  }
 

xox

Joined Sep 8, 2017
674
Are instructions such as this, specific to a particular compiler?
Max.
The instructions target a specific CPU, but the human-readable format depends on the assembler being used by that particular compiler (which is also free to compile directly to machine code, but that's pretty rare).

The snippet you posted could be written in far less lines of assembler, by the way. Feel free to ask if you need a hand trimming it down a bit. :)
 

AlbertHall

Joined Jun 4, 2014
11,961
The snippet you posted could be written in far less lines of assembler, by the way. Feel free to ask if you need a hand trimming it down a bit.
It would be far shorter if it was produced by the paid for version of XC8 but it would still be pretty impenetrable because it wouldn't use the symbols from the C code.
 
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