Try the following paper from MaximOriginally posted by manissri@Mar 30 2006, 01:13 AM
i am desing ing 12 bit pipelined adc .
i want to check the INL and DNL at simulation level ..
plz tell me what type of forces i apply on input and how to calculate the inl and dnl in simulation phase
plz suggest ..
|Thread starter||Similar threads||Forum||Replies||Date|
|Current Measurement on A Fluidic Channel||General Electronics Chat||0|
|AC Voltage and Current Measurement Circuit Design with Differential Amplifiers||Power Electronics||28|
|P||Capacitance measurement||Test & Measurement||2|
|J||Measuring amplified capacitance||PCB Layout , EDA & Simulations||8|
|Diode reverse current affecting ADC measurement?||General Electronics Chat||18|