The control byte should start with a '1', and the datasheet says that this defines the control byte after CS is pulled low. If you always have CS pulled low then it appears to me that you are violating t(css).the control byte does not seem to correspond to what im expecting at the output. If I give it 8 bytes, '10000000' I would expect it to be in internal clock mode, and using a 0-5V input range, and using CH0 according to the control byte configuration on the data sheet.
However with an input of 2.2V on CH0, it gives an output reading of 36.41V. I am decoding the data from the ADC as (data/8.19), Because the counts per volt is 819.2 ( 5V/4096) it is a 12 bit ADC. I can only get the correct output if i make the control byte 00001000. This makes no sense...
I've tried running it in a very simple configuration. ie CS is pulled low all the time. i send my control byte with a 100khz clock, then drop the clock signal. I then run the clock for another 16 cycles and look at the data out.
by Luke James
by Jake Hertz