LTSpice acting up

Thread Starter

AetherWerx

Joined Dec 30, 2011
16
...or at least it appears to do so.

I put together a cross-coupled capacitor voltage doubler. When I have one DC source connected to M1 and M2 (to act as a single voltage rail) C2 exhibits an RC time constant. This should not be the case as it should immediately charge to the DC level once Vgs of M1 is above 3V.

I can fix this by connecting the drain of M2 to its own DC voltage source, V4. I can also ground the gate of M2 which eliminates M2 from the circuit; e.g, it never charges C1. A third way is to reduce the capacitances to <100pF and this delay goes away.

I don't get where the RC delay is coming from because there is no resistance! What gives? Some idiosyncrasy in the simulator?

Thanks.
 

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JoeJester

Joined Apr 26, 2005
4,390
Post the schematic. If it's an anomaly with the circuit, you should get similar results with a different simulation software.

Those users that don't use LTSpice but can "see" a schematic, can have something to offer.
 

ifixit

Joined Nov 20, 2008
652
The bottom pins of M1 & M2 are the sources. The .ic function sets the initial condition for the sources using the node names(sequential system numbers) as a reference. However, when you change the circuit connectivity these node names can change, as they do in your circuit when V4 is connected in.

To fix this, label the nodes with your own names instead of letting the system do it automatically and then the named nodes won't get renamed if you change the circuit.

If the initial condition is 0V you will see the charge ramp to a point where charge and discharge currents are equal on average and if the ic is 2.5V, you won't see this effect because the currents will start of being equal.

Have fun,
Ifixit
 

Thread Starter

AetherWerx

Joined Dec 30, 2011
16
The bottom pins of M1 & M2 are the sources. The .ic function sets the initial condition for the sources using the node names(sequential system numbers) as a reference. However, when you change the circuit connectivity these node names can change, as they do in your circuit when V4 is connected in.

To fix this, label the nodes with your own names instead of letting the system do it automatically and then the named nodes won't get renamed if you change the circuit.

If the initial condition is 0V you will see the charge ramp to a point where charge and discharge currents are equal on average and if the ic is 2.5V, you won't see this effect because the currents will start of being equal.

Have fun,
Ifixit
Bam! And that is what it was. I picked up LTSpice recently and have found it to be pretty damn good.

It took me a while to figure out how to build the circuit. I was using 3 terminal nMOS's and finally realized the body diode was causing a problem with holding charge on C1 and C2 when the source was at a higher voltage and the drain.

Thanks.
 
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