# Logicworks Two PushButtons

Discussion in 'Homework Help' started by engineer-twilightsparkle, May 2, 2014.

1. ### engineer-twilightsparkle Thread Starter New Member

May 2, 2014
4
0
Hi Everyone,

I am tasked to build the following circuit: I have to build a circuit that consists of two push buttons, a sequence recognizer, and a 4 bit counter. The circuit should work in the following way:

The user should be able to push the push buttons and input a 0 or 1, this sequence of 0 and 1 will be feed through the sequence recognizer and the recognizer should output a 1 if the sequence 1101 is given as input. Now, the 4 bit counter should disable the input after the user has failed to input the correct sequence after 8 button presses. The user has to then reset the machine to try another 8 times by clicking the external reset that you provide.

Now I already have all the working pieces together, but for the life of me I have tried for 3 days already and I still can't figure out how to get two push buttons to connect to my 1 input recognizer. One pushbutton will give a 0 signal and the other will give a 1 input signal.

I constructed my circuit in LogicWorks 5. So if you'd like to see what it looks like I can send you the files.

Here is a link to a picture of my circuit.

http://mekoxtwisparkle.deviantart.com/art/Circuit-451473830?ga_submit_new=10%253A1399017727

All Flips Flops are created the same way including the Neg D Flips Flop. All are positive edge driven.

Last edited: May 2, 2014
2. ### ericgibbs AAC Fanatic!

Jan 29, 2010
3,235
565
hi,
I simple circuit diagram showing what you have already done would help us to see the problem.
E
I dont use Logicworks..

3. ### engineer-twilightsparkle Thread Starter New Member

May 2, 2014
4
0
ericgibbs, I included a picture of my circuit on my original post. Just follow the link.

4. ### ericgibbs AAC Fanatic!

Jan 29, 2010
3,235
565

Have you considered just using a 4 bit shift register for the sequence 1101.?

Clock in a '0' or '1' from the push switches.

E

5. ### engineer-twilightsparkle Thread Starter New Member

May 2, 2014
4
0
Thank you so much. Ahh, well that's a good point but our professor said that we must use state machines for this, no registers allowed. My main concern is how to connect these parts together. Those push buttons I don't know how to connect them, this is my first time taking a circuits course and my goodness I've just about given up been working on for the past 2-3 days just trying to figure out how to connect it. XD

6. ### ericgibbs AAC Fanatic!

Jan 29, 2010
3,235
565
him
Looking thru it, what a convoluted circuit.

This could take some time, main problem I have is the size of your circuit image.

E

EDIT:
Attached a clip from your drawing, can you explain how you expect this circuit section to generate a Clock and Data state.?
Whats a Neg D Flips Flop.

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Last edited: May 2, 2014
7. ### engineer-twilightsparkle Thread Starter New Member

May 2, 2014
4
0
So, as for that part of the circuit that where I'm having trouble with. XD

I want to produce input to my sequence recognizer that should recognize 1101 and output a 1 at the E Output when the user presses those two pushbuttons. So when he pushes one it sends a one output, when he presses the other he sends a 0.

The logic is messed up, but in gist what it should do is every time the user presses a pushbutton the it should also act as the clock to change the state of my push button flipflop.

So really, that part is the one that is bugging me a lot. I need to come up with the logic I described above.

As for what's that NEG D Flip Flop, here is a picture of what's inside it, it is merely a negative edge triggered flip flop.

http://mekoxtwisparkle.deviantart.c...56-AM-451516087?ga_submit_new=10%3A1399042507

8. ### ericgibbs AAC Fanatic!

Jan 29, 2010
3,235
565
hi,
The push switch logic is far too complicated, the two F/F's are not required.

Consider having the switches so they are normally Low, push to make gives a High Clock.

You need to delay the Clock rising edge so that it occurs after the Data High or Low voltage change occurs at the 'D' input of the 'recogniser'.

The Clock delay could be achieved by adding inverter gates in series with Clock signal and then using an OR gate to combine them.

The Data signal would also be generated by the push switches, use inverters to get the correct 'sense' ie: High/Low for the Data to the 'recogniser.

Do you follow that OK.?
E