# logic gate question

Discussion in 'General Electronics Chat' started by carl vianelli, Jan 15, 2013.

1. ### carl vianelli Thread Starter New Member

Oct 19, 2012
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helo everyone, i'm wondering about the inverting "dot or small circle" on some gates why on a buffer the dot is behind (input) of the triangle and most of the times in the front (output) of the triangle,it seems it does the same function, also the same with AND/NAND gates.
this is just something i'm asking myself why???
just curious, thanks carl

2. ### MrChips Moderator

Oct 2, 2009
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A triangle by itself means a non-inverting buffer, i.e. output = input.

The bubble means an inverter, i.e. output = NOT input.

The bubble can be placed on the input or output of the triangle. The function is the same but the perspective is different.

If the bubble is on the input, then it means that the input is ACTIVE-LOW, i.e. it takes a LOW level to activate the function.

If the bubble is on the output, then it means that the output is ACTIVE-LOW, i.e. a LOW level is output when the function output is active.

This understanding is critical and hence make certain you understand it.

3. ### WBahn Moderator

Mar 31, 2012
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Also, an AND and a NAND are NOT (no pun intended) the same. Be sure you understand the difference.

Now, if you had an OR gate with an inversion bubble at both of the inputs, this is equivalent to a NAND gate (and AND gate with an inversion bubble only on the output). You will sometimes see this. In cases like this, the logic is unaffected but it can be easier for a human to understand the underlying logic. For instance, let's say I have a logic signal that is HI if the water level in a tank is above a certain level and I have another signal that is HI if the mixing fan is running. I then want to sound a buzzer if the water level is below the threshold or if the fan isn't running. A straight forward way of saying this is, "Sound the buzzer if the water level sensor is LO or the fan is LO." That, in turn, screams for drawing an OR gate with inverters at each input. I could just as easily use a NAND gate, but now the logic is a lot harder to spot because I am saying, "Turn off the buzzer if the water level is HI and the fan is ON". It is a perfectly valid and correct description, but it may not capture the essence of the goal behind the circuit, which is that I want to sound the buzzer if either of two conditions is met.

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4. ### crutschow Expert

Mar 14, 2008
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If the bubble is on the output of an AND gate symbol, that indicates it does the NAND function (all inputs must be low to give an output high). If the bubbles are on the inputs of an AND gate symbol, that indicates it does the NOR function (Any input high will give an output low).

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5. ### carl vianelli Thread Starter New Member

Oct 19, 2012
8
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on the NOT gate it will work with LOW or HIGH input, now it's the "ACTIVE" part i'm confused with. the gates ACTIVE-IN, ACTIVE-OUT still work the same way right? (inverters)

6. ### MrChips Moderator

Oct 2, 2009
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The way I look at it:

If the bubble is on the output of an AND gate, this is an AND function with ACTIVE-LOW output.

If the bubble is on both inputs of an AND gate, this is an AND function with ACTIVE-LOW inputs.

As another example:

If there are bubbles on all inputs and the output of an OR gate, this is an OR function with ACTIVE-LOW inputs and outputs. This is not an AND gate in functionality.

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7. ### WBahn Moderator

Mar 31, 2012
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As an aside, these two equivalencies are nothing more than a symbolic representation of DeMorgan's Theorems

(AB)' = A' + B' => A NAND gate is equivalent to an OR gate with inverted inputs.

(A+B)' = A'B' => A NOR gate is equivalent to an AND gate with inverted inputs.

In general, you can swap and AND symbol for an OR symbol (or vice-versa) provided you invert ALL of the inputs and outputs (put a bubble there if there isn't one and remove the bubble if there already was one).

8. ### MrChips Moderator

Oct 2, 2009
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There are two kinds of logic in this respect: positive logic and negative logic.

In positive logic, a TRUE is represented by a high voltage. We call this ACTIVE-HIGH.

In negative logic, a TRUE is represented by a low voltage. We call this ACTIVE-LOW.

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9. ### WBahn Moderator

Mar 31, 2012
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Let's look at an example. Many circuits have a reset signal that has to be taken LO in order to make the reset happen. When the reset signal is HI, it is just sitting there looking stupid.

Thus, we say that this reset signal is an active-LO signal, by which we mean that the logical concept of "asserting a reset" is "true" when this signal is LO. We indicated this by putting an inversion bubble on the input.

Similarly, some outputs of some circuits go LO in order to tell us something. For instance, a particular circuit might have an output called HOT that tells us that something is overheating but that output is normally HI when things are fine and goes LO when an overtemp condition is detected. This is an "active-LO" output, meaning that it is "true" when it is at a LO level. This is indicated on the circuit diagram by putting an inversion bubble on the output.

For a variety of reasons we are always mixing "positive logic" (something is TRUE if it is HI) and "negative logic" (something is TRUE if it is LO) in our circuits. By convention, however, the symbols in the diagrams are always positive logic (and if a diagram is a rare exception to this, it should state that in bold very prominantly) and we use inversion bubbles, where needed, to keep things straight.

Thus, the basic AND symbol will always produce a HI output only if both inputs are HI. The circuitry that makes up an AND has no idea about the concepts of TRUE and FALSE, it only knows that a HI signal on both inputs means it should output a HI signal and any other combination should produce a LO output. It's up to the designer to specify what all of that means from a logic standpoint.

10. ### WBahn Moderator

Mar 31, 2012
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Boy, MrChips, we are really in sync on this one! (your phase is just leading mine by a little bit).

11. ### carl vianelli Thread Starter New Member

Oct 19, 2012
8
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ok, thanks for helping me start to understand better, the OR with bubbles on the inputs equils a NAND this helps me alot but, it that NOT gate that still gets me.

12. ### carl vianelli Thread Starter New Member

Oct 19, 2012
8
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maybe they just didn't have room in the front of it.
HA HA

13. ### WBahn Moderator

Mar 31, 2012
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They may have done that to capture the notion that the signal is inverted and then it is buffered (given additional drive strength) instead of just being a simple inverter. From a logical and functional standpoint, they are equivalent. But from a physical sense, it is valuable to have an obvious visual cue which signals have strong drive strength and which are just normal logic gates.

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14. ### carl vianelli Thread Starter New Member

Oct 19, 2012
8
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That is what it must be, makes alot of sence ,thanks
this all started from me looking at the logic diagram of a 74hc138.
i seen these simbles before but i didn't really think much about them.

15. ### MrChips Moderator

Oct 2, 2009
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There is one more convention to add for consistency.

Suppose you have a RESET signal that is ACTIVE-LOW, i.e. it takes a low voltage to perform the reset function. Not only the bubble would drawn where ever you see the RESET function, whether input or output, you will also label RESET with a bar over the word "RESET".

The bar over RESET also indicates that the reset signal is negative logic (ACTIVE-LOW).
The bar does not mean that the reset is NOT RESET. The bar is part of the label and treated such, just as if you made it a green label, or whatever attribute you wish to apply to the label.

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