Discussion in 'General Electronics Chat' started by electron_prince, Sep 26, 2012.

Sep 19, 2012
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2. ### Stuntman Senior Member

Mar 28, 2011
213
55
Are you familiar with the concept of output impedance?

To help, I reference this schematic from wikipedia:

Instead of going through a long book-like description, I"ll leave that you to you (hint, search for input and output impedance). Lets keep it simple.

Lets say your input voltage is Vs, and your non-inverting and inverting terminals of the op-amp are VL+ and VL- respectively.

These two impedances, Zs and ZL, although not necessarily intended, are inherant to any power supply and any op amp. The Zs is the output impedance of your power supply, the ZL is the input impedance of your op amp.

Lets say your input voltage Vs, is 5V. The only way VL (the input to your op amp) will be the intended 5V is if either Zs is 0 (perfect power supply), or ZL is infinity (perfect op amp). In reality, we know this is never true, (consider even a trace on a circuit board has some impedance).

So, what you will find is that VL, the voltage at the op amp, will be a slightly lower voltage than the actual power supply. This is due to the loading effect. Now, you might be asking, how much lower. Well consider if the output impedance of the power supply (Zs) is 1 ohm, and the input impedance of the op-amp (ZL) is 1 M ohm, using KVL, we are somewhere around 4.999995V. So the loading effect is minimal and won't even be picked up on general test equipment.... which comes to another thinking point:

What happens when you hook up a voltmeter, with an input impedance of 1M ohm, to the inputs of the op-amp? Consider that this would essentially add another ZL in parallel with the first. If you use KVL, you'll find that this drops the voltage at the op amp terminal yet again; Another example of the loading effect.

3. ### electron_prince Thread Starter Active Member

Sep 19, 2012
95
3
and how would you define "loading effect" for the output port. Why loading effect is minimized because of output impedance being zero (ideally)?

4. ### Stuntman Senior Member

Mar 28, 2011
213
55

Remember, the loading effect is actually a voltage divider. Look at the circuit again... Zs and ZL make a simple voltage divider, with the non-inverting terminal + measuring the divided voltage. So what happens if you take the "top"(Zs) resistor in a voltage divider and make it zero?

What happens if you make the bottom resistor (ZL) infinite? What if you make it have zero impedance?