Linear Mode 1000w Discharger prototype keeps popping fets

Thread Starter

magudaman

Joined Feb 27, 2012
39
So I am trying to build a serious discharger for testing batteries and battery packs from 2.0V to 80V and currents up to 250 amps (limited by wattage). Sticking with the design of many commercial dischargers I wanted to start by trying to do MOSFET driven in its linear region.

Through some other forums I was given a circuit diagram put together for a magazine article a while back for a simple constant current discharger. From that circuit I came up with this circuit:



The circuit is run by 10V. In the non inverting input I have a 0-5V that controls the level of current. On the inverting input I have the current sense from the 0.02ohm resistor. This all dumps out into a FET that will burn off as much as 100 watts.

So this circuit during testing didn't have the .1uf capacitor to begin and seemed to be working great at 3.7, 13v all the way up to about 30V but as soon as I hit around 40 volts POP! the fet fails. I hooked up a scope to find a nasty oscillation that seemed to be causing quite a bit of inductive voltage:

13.3V battery at 7 amps:



So I added that 0.1uf capacitor and everything went perfectly flat and back to DC

So I thought I had fixed the problem and tried a 60V source: .2 amps, .4 amps, .6 amps POOOOFFFFF!!!! Darn

So of course I didn't have the scope recording during the failure so I really have no idea what happened. Even DC mode the fets should be good to 5 amps @ 60V peak. My current current sensors never see any peaks and seems to be very steady.

FET:
Alpha & Omega Semiconductor Inc
100V 150A AOT410L
.45 C/W
http://aosmd.com/res/data_sheets/AOT410L.pdf

OP AMP:
Texas Instruments TLV2371IP
Rail to Rail input and output

http://www.ti.com/lit/ds/symlink/tlv2370.pdf

So I know there isn't a lot of information here but do you think this is the FET not up to the task? Or is my circuit not reacting fast enough as the voltage gets higher and just start pulses high current? Other possibilities?
 

Thread Starter

magudaman

Joined Feb 27, 2012
39
I guess that's not the problem. Anybody else care to try?
Far as we know, I still wonder about these cheaper Alpha and Omega Fets though, before I give up completely I am definitely going to try another FET and manufacture. I might just try a 200V fet just to be safe. In fact the 200V fet for almost the same price has an even better .3 w/c rating and still can do 25 amps 2 volts
 

jimkeith

Joined Oct 26, 2011
540
What are you using for a heatsink?
Tj = 5A * 60V * 0.45°C/W + 25°C = 160°C (assuming an infinite sink)
Unless you have an exceptionally good heatsink, you may be simply frying the device.
Anytime I have done this sort of thing, it took many cells in parallel to obtain reliability.
 

Thread Starter

magudaman

Joined Feb 27, 2012
39
What are you using for a heatsink?
Tj = 5A * 60V * 0.45°C/W + 25°C = 160°C (assuming an infinite sink)
Unless you have an exceptionally good heatsink, you may be simply frying the device.
Anytime I have done this sort of thing, it took many cells in parallel to obtain reliability.
This was just the maximum the fet could handle, I never intend on exceeding 100 watts at any given voltage. So at 60V I wanted to achieve 1.6 amps. My heat sink was cold at the start of that test so around 20c and didn't even get a chance to warm up the mass of the sink.

My 1000w sink is about .07c/w; that's with forced cooling of course
 

THE_RB

Joined Feb 11, 2008
5,438
And increase the value of the resistor, you gain in safety as the resistor will dissipate more and the FET less, and the increased voltage on the resistor gives better feedback and better stability.

And heatsinking is good! I bet if you posted a photo of your heatsink (where you killed the FET at 60v 0.6A) people would criticise its size... ;)
 

Ron H

Joined Apr 14, 2005
7,063
I think you need some compensation from the output of the op amp back to the inverting input. The op amp is probably still oscillating.
I agree. The gate resistor and capacitor add a pole in the loop, in addition the the op amp's pole. This is why it was unstable. Adding the 100nF cap pushes the external pole to a lower frequency, but probably not far enough to overwhelm the internal pole.
Try changing the gate resistor to 100Ω, and the resistor in the feedback path to 10k. Add 100pF from op amp output to inverting input.

EDIT: I didn't make it clear that you need to omit the cap from gate to GND.
 
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Thread Starter

magudaman

Joined Feb 27, 2012
39
Alright did some more testing today. I started to reverse engineer the retail discharger device (CBA) to look for more ideas. So taking from their cues I added a .1uf and 10uf capacitor on the gate of the FET with a 10K ohm resistor from gate to ground. I also added a .1uf resistor from the sense line to ground but ended up removing it as it was causing a nasty oscillation.

So I put the new FET in with my new caps and tested the circuit at ~60V. I slowly increased the current and everything looked extremely smooth. I hit one amps started to get excited and then POOF again. No go. At least I recorded this on this time.

As you can see I am not getting any oscillations or peaks right up to the point it blows up. Then all the sudden the op-amps decided to increase the voltage by ~3 volts and then detects the crazy amount of current, decreases but it is already too late. It's interesting you can actually see it takes around 25 milliseconds for the fuse to pop.



Here is a close up of the problem area:



Other interesting facts that still have me wondering about fet choice...the retail discharger device I have is rated to 55 volt yet they used a 100v fet. Again I intend on using 200v if I can get this working because of the price, better DC performance, and .3c/w junction to case. I still wonder if I am over a threshold for some reason and going into a sort of avalanche condition and the op amp can't react fast enough.

Other consideration my op amps slew rate is 2.2v/μs and the retail unit slew is 5.5v/μs. Maybe my unit can't keep up?

I have to give the ideas above some thoughts too. I gotta order some more FETs and get this thing figured out before they arrive.
 

shortbus

Joined Sep 30, 2009
10,045
Unless I'm missing something here or something is missing in the schematic shown in post #1. Where is your gate driver? This is a classic 'high side switch'. As the source voltage goes up the gate voltage is no longer high enough to put mosfet in the active mode. It will be in the 'linear' range of conduction, basically a resistor, and a low wattage resistor at that.

To change the circuit to a 'low side switch' and not need a gate driver, connect the ballast/dropping resistor to the mosfet drain terminal and the source to ground.
 

Ron H

Joined Apr 14, 2005
7,063
Unless I'm missing something here or something is missing in the schematic shown in post #1. Where is your gate driver? This is a classic 'high side switch'. As the source voltage goes up the gate voltage is no longer high enough to put mosfet in the active mode. It will be in the 'linear' range of conduction, basically a resistor, and a low wattage resistor at that.

To change the circuit to a 'low side switch' and not need a gate driver, connect the ballast/dropping resistor to the mosfet drain terminal and the source to ground.
The transistor is not operating as a switch. This is a classic current sink. It is a completely analog circuit.
 

shortbus

Joined Sep 30, 2009
10,045
OK, I missed that part. But doesn't the gate voltage still have to follow the same Vgs parameters? As I understand it, a Jfet is more suited for this type of circuit, because they are made for a linear application where a Mosfet should be used for a switch.
 

Ron H

Joined Apr 14, 2005
7,063
OK, I missed that part. But doesn't the gate voltage still have to follow the same Vgs parameters? As I understand it, a Jfet is more suited for this type of circuit, because they are made for a linear application where a Mosfet should be used for a switch.
MOSFETs work fine in analog apps. Some linear (analog) audio amps use them as output stages.
Power JFETs are a rare breed. Here is one manufacturer. There may be others.
 

Ron H

Joined Apr 14, 2005
7,063
Magudaman, here is a simulation of your compensation scheme (as I understand it), and mine. I couldn't find a spice model of your MOSFET, so I picked one that is similar, except for breakdown voltage.
I know you aren't pulsing the input, but simulated pulsing is a good way to expose instability tendencies. Note that your simulated scheme doesn't oscillate, but it is very close to it. My scheme is extremely stable, at least in simulation.
 

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bountyhunter

Joined Sep 7, 2009
2,512
Then all the sudden the op-amps decided to increase the voltage by ~3 volts and then detects the crazy amount of current, decreases but it is already too late. It's interesting you can actually see it takes around 25 milliseconds for the fuse to pop.
Then your current limit loop is too slow. Maybe you have a pole that slows it down. But, any current limiter has to be fast enough or things blow up.
 
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