Hello, I would like to make sure I understood something about my level shifter circuit that I made. Basically, I have a 0/5VDC digital signal coming out of a TSOP4838 IR sensor which needs to be connected to a 3.3VDC CPLD input. So, when the TSOP is outputing 0VDC, I need 0VDC to my CPLD input. When the TSOP is outputing 5VDC, I need 3.3 VDC to my CPLD input. Please view what I did in the attachment! QUESTIONS: A) In sketch #1, when point A is 0VDC, using a conventional current anolagy, the current from the 3.3 source (point C) will want to go down through R1 and seek groung, but because of the diode, it will be blocked and therefore, point B will see 0 volts DC. Is this assumption correct? B) In sketch #2, when point A is 5VDC, using a conventional current anolagy, the current from the 5.0 volt source (point A) will want to go up through R1 and seek the lower voltage at point C, but because of the diode and voltage source at point C, the total potential difference across R1 will be 5VDC - (3.3 + 0.7) which will make VR1 equal to 1V. Is this assumption correct? C) No mater what resistance I put as R1, VR1 will always be 1V... and therefore the only thing that will change is the the current across R1. Is this assumption correct? D) In the present circuit, when point A = 0 VDC, point B is 0 volts DC. However, when point A = 5VDC, point B be is approximately 3.7 to 3.8 VDC. My question is, what can I do to make point B 3.3VDC when point A is 5VDC without using an off the shelf level shifter? All feedback appreciated! PS. I apologize for the smugy sketch... if it needs to, I can redo it much neater. r
I did not understand anything of the attachment. It may have helped to indicate which side is the input and which side is the output. As the TSOP has a 30K resistor as it's output pull up, the signal level can be reduced to 3.3V with a simple resistor to ground. A (standard) value of 58.3K would do nicely.
hello guys, Ron_H, I get your solution... ErnieM, sorry for the messy attachment,,, One thing though, can you show how you got that resistor value..... you must of picked a current right? .... and if so based on what? thanks
rougie: The two resistors form a voltage divider: Vo = Vi R2/(R1+R2) or Vo/Vi = R2/(R1+R2) We know Vo (3.3) Vi (5.0) and R1 (30K) so just solve for R2. Ron: Good point about the tolerance. To allow for that I'd need to know what the CPLD input requires for high and low, but my guess is a good 40K would cover the variation of the TSOP. I'd also guess there is an ESD diode on that input that would safely clamp the voltage without any other components... but that would be a guess. <s>
Hi ErnieM, Okay, at first I didn't catch what you were doing, but then I realized that you took the 30K as R1 and R2 as two resistors in series forming a simple voltage divider and applied it to a ratio equation. So actually solving for R2: Vo/Vi = R2/(R1 + R2) Vo(R1 + R2) = R2Vi VoR1 + VoR2 = ViR2 VoR1 = ViR2 - VoR2 VoR1 = R2(Vi - Vo) R2 = VoR1/(Vi - Vo) R2 = 3.3 x 30000 / (5.0 - 3.3) = 58235 ohms Questions: A) When you say vout / vin, these are really not in reference to the in/out voltages of the circuit right??? In my circuit Vout meant the 5.0VDC coming out of the TSOP part. And the Vin meant the 3.3 volts that the CPLD was recieving. But you seemed to have taken the Vout as 3.3VDC and the Vin as the 5.0VDC which is the opposite to my intented voltages! I guess you did this so the equation makes sence right? B) Ron_H, What made you decide to choose a 2n3905? Could of you just chose a 2N2222 as well? C) In my innitial post, I asked a few questions, are my assumptions correct, if not ... can you please describe why? Thanks guys for your help, that was very nice of you! Regards Rob
2N2222 would be fine. Regarding your sketches: The CPLD voltage will be ≈(3.3V+0.7V)≈4V The current would only be 625uA if the resistance inside the TSOP4838 were zero. It is actually ≈30k, so the 1.6k is not needed. The CPLD voltage will be too high (≈4V).
okay Exactly! Ah! Yes... Now I know why I don't need the 1.6K! Yes its aprox. 3.8 VDC Okay, Ron_H, thanks so much for your input. I like your transistor idea.... Theory and curiosity wise I would still like to explore ErnieM's solution... however, I just tried it and I still get aproximately 4,9Volts at the CPLD input??? ErnieM, I have provided a clean schematic so we can all clearly see what I am doing. In my attachment, I have figure-1 and figure-2. Figure-1 is what I have now (which is about to be changed LOL!). At the CPLD input I have about 4Volts !!! Which is no good! Now, Figure-2 is what you recommended but somehow when I tried it (leaving the 3.3VDC at Point B) I still measured 4.9Volts at the CPLD input ?? The reason I didn't try putting the 3.3VDC at point A is because I am afraid that the emitter of T1 (In the TSOP part) and point B will short out when T1 is saturated (biased)??? My question is does the 3.3VDC go at point A or point B or anywhere else in figure-2? Confused? thanks for your help! r
Yes the 58K worked... so both solutions work! One more thing Ron_H, Just curious! Is this something that we all should assume or is this written in the TSOP spec... cause I tried looking for something that may mention that the internal resistance may vary between 20K and 30K but I didn't see any mention of this. Thanks for your help! r
I meant put the additional resistor to ground to form a voltage divider. Also, Ron's would work with just 1 resistor if you drive it off the 3.3V. See attached.
As the 30K internal resistor may well be part of the semiconductor die it's exact value is subject to huge variations. Thus it's good practice to allow for such variations.