length of rising edge?

RichardO

Joined May 4, 2013
2,273
The rise time of the signal is not the only limiting factor. Each of the devices has a delay, setup time and hold time.

You need to check the specifications for each of the parts you are using. You should also look at the 74LS family specifications for information that applies to all of the 74LS series parts.

Whether you can get this to work depends on your clock frequency.
 

crutschow

Joined Mar 14, 2008
23,159
You never try to perform a series of functions on the clock edge. That's why you use clocked synchronous logic, to allow time for all the signals to settle before they are used. Thus you need to "load a register, output it into full adders, load the sum into another register, and output that register into another register" during the times the clock is stable.

One way is to have the first clock edge load the first register. Then during the stable period the full adder will output its sum to the next register. The next clock rising edge latches the adder data which is then output to the third register. This final register is latched with the third clock rising edge.

Loading registers doesn't make sense if you want to do everything on the rising edge. In that case you don't use clocked registers. What is the purpose of the registers?
 

Thread Starter

Gadersd

Joined Dec 8, 2012
98
The reason is the I am building a computer, and one of the instructions require this to be done in one clock cycle. This is what the 6502 does.
 

crutschow

Joined Mar 14, 2008
23,159
Registers are used to store information between clock cycles so I don't see what your registers do since you want the data to transparently go through them. :confused: Sounds like you don't need the registers.
 

RichardO

Joined May 4, 2013
2,273
The reason is the I am building a computer, and one of the instructions require this to be done in one clock cycle. This is what the 6502 does.
The 6502 never does more than one data transfer per clock cycle. What is the instruction you are talking about?
 

crutschow

Joined Mar 14, 2008
23,159
Are you confusing an instruction cycle with a clock cycle? Except for RISC computers it generally takes several clock cycles to achieve one instruction cycle.
 

DickCappels

Joined Aug 21, 2008
5,760
And the 6502 uses a two phase clock. Phase one sets up the operation (such as address and data on the bus) and phase two makes the transfer.
 
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