Does it mean my power supply is not great?

Power supplies, particularly switch-mode types, can have ripple or noise on their outputs. Hence the use of supply decoupling capacitors.

 

I don't know if this thread is still active, but the clock pins shown in post #1 should have pull down resistors, then pulled up (active high) to clock the input.

 

I don't know if this thread is still active, but the clock pins shown in post #1 should have pull down resistors, then pulled up (active high) to clock the input.

Very much alive, but yes I figured out something was wrong with it. I think the latest diagram (see post 20) should be ok.

 

Very much alive, but yes I figured out something was wrong with it. I think the latest diagram (see post 20) should be ok.

I don't see how that will fix it. A CMOS input pin can't sink milliamps of current to drive an LED.

 

I don't see how that will fix it. A CMOS input pin can't sink milliamps of current to drive an LED.

Sorry I could not find the object for a CD40110B in the sketcher, it's not directly driving a LED.
It is connected to the Clockup pin of this ic

there:

 

Well...the 1u cap is doing nothing for debounce.
The datasheet shows 15us max clock rise/fall time, so the clock input really should be externally buffered if using an RC type debouncer with a mechanical switch to keep the clock edges sharp.

 

the clock pins shown in post #1 should have pull down resistors, then pulled up (active high) to clock the input.

Agreed. The arrangement the T shows in Fig 1 means that the count should change when the button is released, not pressed.

 

Well...the 1u cap is doing nothing for debounce.
The datasheet shows 15us max clock rise/fall time, so the clock input really should be externally buffered if using an RC type debouncer with a mechanical switch to keep the clock edges sharp.

Well, it works...
Anyway, my switch is mechanical

Could you explain what you mean with "externally buffered if using an RC type debouncer"?
Thanks

 

there:

Schematics are easer to read if you don't draw them upside down and sideways:

 

Well, it works...
Anyway, my switch is mechanical
View attachment 308021
Could you explain what you mean with "externally buffered if using an RC type debouncer"?
Thanks

The clock pin requires a rise/fall time less than 15 microseconds. An RC type debouncer in intended to provide a slow rise of the input signal from the switch. The switch bounce duration usually is greater than 20 milliseconds, so the RC signal needs to rise slower than that, usually 50ms to cover most decent quality switches. That far exceeds 15 microseconds. So..to keep the input signal that the clock pins see "nice and square", add a schmitt inverter between the RC filter and clock pin. That way the RC filter can rise slowly, but the inverter output will switch quickly (much less than 15us). You'll have to rearrange the filter and switch to be active low, however.

 

Decoupling.

Switch debouncing is the obvious first suspect, but CMOS counter stages need a stable, low impedance power source.

Normal power supply decoupling for a CMOS logic device is a ceramic 0.1 uF capacitor across the power pins, Vdd and Vss, Vdd and GND, Vcc and GND, etc. Because the 40110 is capable of output currents that are much larger than normal, I would increase the decoupling cap to 1.0 uF. Mount the cap as close as possible to the chip, with the shortest possible leads.

Also, there is nothing in the datasheet about operating the part without current limiting resistors on the seven display segment outputs. Extra-high-current output spikes can scramble the internal circuits.

What is the source of the schematic in post #1? Link?

ak

 

Hi all,
Foreword: I'm (really) new to electronics, this is my first project.
I'm trying to get a simple counter working with a CD40110B + 7 segment led. After smoking some components I got to a setup that seems to work BUT sometimes it skips a number, e.g. from 4 to 6. Both up or down.
I tried replacing the buttons and the counter, but no luck. The 5V supply seems stable, it's rated for 30W.
I'm using this schematic with additional 330 Ohm resistors inline each segment input.
View attachment 307679

Buttons: Adafruit buttons
Digit: Wurth WL-T7DS 7 Segments Display THT Single Digit T7DS056SC
Counter: CD40110B

Any idea of what the issue could be?

Thanks
Matt

This will make everything easier:

Title: Understanding Basic Electronics, 1st Ed.
Publisher: The American Radio Relay League
ISBN: 0-87259-398-3

 

Wait a minute! You debounce the inputs. Not the outputs. Ie, the segments. The two clock pins on the IC - the clock up and the clock down - need the debounce circuitry. That’s where the caps belong.

 

The clock pin requires a rise/fall time less than 15 microseconds. An RC type debouncer in intended to provide a slow rise of the input signal from the switch. The switch bounce duration usually is greater than 20 milliseconds, so the RC signal needs to rise slower than that, usually 50ms to cover most decent quality switches. That far exceeds 15 microseconds. So..to keep the input signal that the clock pins see "nice and square", add a schmitt inverter between the RC filter and clock pin. That way the RC filter can rise slowly, but the inverter output will switch quickly (much less than 15us). You'll have to rearrange the filter and switch to be active low, however.

Can you give me some suggestions? I found a wide range of debouncers... I assume I have to go for non-inverting, but I don't know about 1 element, 8 elements, ... thanks
https://www.digikey.ie/en/products/detail/toshiba-semiconductor-and-storage/TC74HC245APF/870490
https://www.digikey.ie/en/products/detail/texas-instruments/SN74HC126N/376889

 

A switch debounce circuit can be:

2/6 of a regular hex inverter
2 sections of any AND / OR / NAND / NOR gate (as long as the two combine to be non-inverting)
1/6 of a Schmitt Trigger hex inverter
1/4 of a Schmitt Trigger NAND gate
(Note that the Schmitt gates can be inverting)
2 transistors and a few passive components.

The basic requirements are a short R-C delay timer (to let the bouncing settle down) and a circuit to turn the slow edge out of the timer into a fast edge for downstream logic inputs without introducing noise of its own into the signal. There are a zillion ways to do this, so it often comes down to what unused gate sections are laying around in the rest of the circuit. The most basic form is 1 resistor, 1 capacitor, and 1 Schmitt-Trigger-input gate.

ak

 

Here's an article on debouncing. I prefer the single resistor and capacitor solution that wasn't described. Or using a spare flip flop.

 

Can you give me some suggestions? I found a wide range of debouncers... I assume I have to go for non-inverting, but I don't know about 1 element, 8 elements, ... thanks
https://www.digikey.ie/en/products/detail/toshiba-semiconductor-and-storage/TC74HC245APF/870490
https://www.digikey.ie/en/products/detail/texas-instruments/SN74HC126N/376889

Here is a common circuit that provides debouncing. See below.



The circuit is arranged to provide a high output when the input is pulled low.
The graph on the right shows the effect of the debouncer for switch bounce duration's of 20ms to 150ms.

I've shown two different device types used for the debounce circuit. Either one can be used.

 

Hi,
I'd like to thank all of you for the help you gave me in the last week.
I learned a lot of practical aspects that will help me in this project.
I'm "proud" to say that I put together a soldered prototype and it is working just fine, can't believe it!
Thanks again & Bye!
Matt