IR2101 problem with 300VDC

Thread Starter

tatsuki20

Joined Jun 22, 2013
6
Hello everyone,

I've been making a circuit Full-bridge Phase-shift ZVS. I used 2 IR2101 to control high and low side, and all the 4 MOSFETs are IRFP22N60K, as you can see from the figure

The frequency is 50kHz. Dead-time is 1us. The M8 and M7 are lagged by 4us compared to M5 and M6, correspondingly. The Boostrap capacitors I used are one 100nF ceramic cap and one 10uf electrolytic cap. The boostrap diode is HER107 (not MUR120 like in the figure). Everything was fine when I applied 15V to VCC of the 2 IR2101 to test the signal of high side and low side. However, when I apply 300V to the drain terminals of the 2 high side MOSFET, the 2 IC were broken (but they did not warm up significantly, there was no smoke), when i put out 300V and measure the signal again, there was no signal from the HO, and the amplitude of the pulse from the LO was on 3.8V, not 15V like before. I tried 3 times and damage 6 IC but the results were still the same. Can anyone help me, please? :(
 

Attachments

ronv

Joined Nov 12, 2008
3,770
Maybe a couple of questions.
What is the purpose of the capacitors from gate to source? Is this how you are trying to get the dead time.
You really don't need the 47k from gate to source and it makes your boost cap very large. What is the voltage rating on the 4.7Ufd.?
 

Thread Starter

tatsuki20

Joined Jun 22, 2013
6
ah, i forgot, in the real circuit, I test 3 times with some changes applied to each time. Even when there was no resistor there (it means that there is only the 10R resistor from the HO/LO to the gates) the IC was still broken then. Although the voltage over the 4.7uf is only 15V (=Vcc) but I still put one with voltage rating of 450V to be sure
 

ronv

Joined Nov 12, 2008
3,770
Ahh, I see the problem. You need a much bigger driver. The 2101 can only supply 100 to 200 ma. By the time you make the gate resistor big enough to limit the current it is to low to turn on the FET fast. Take a look at the IR2110. It would be better if you could put the dead time in the logic instead of the FET gate.
 

Thread Starter

tatsuki20

Joined Jun 22, 2013
6
I only put 10R res between HO (or LO) pin and gate, and it still went broken. Here is the signal that I put to opto before coming to HI/LI pins to M5 (yellow), M6 (green), M7 (violet), and M8 (blue)

 

Attachments

ronv

Joined Nov 12, 2008
3,770
That looks good. So why do you have the caps from gate to source??
Maybe you can scope the gate signal with the lower voltage?
 

Thread Starter

tatsuki20

Joined Jun 22, 2013
6
The caps from gate to source is the solution that I found somewhere in a Chinese forum, the simulation was fine, but I haven't put caps between gates and sources in real circuit, cos' it may affect the rise-up and down of the signal; yet, the IC was still broken.
The IC I used was of SOIC kind, because the Vcc 15V-same ground that I created is limited to 1W, and the SOIC kind has 625mW max. I'm going to try DIP (power dissipation max: 1W) to see if there is anything different.
If things cannot turn out to be OK, I may try to use IR2110 (power dissipation max: 1.2W). Do you find any other error in my circuit?
 
This won't affect your ir2110, but I usually put the cap between the drain and the source (not gate to source). This is a "standard" in Class E circuits and is called the Shunt (or Snubber) Capacitor. I use .039uf but size matters. I also use 1000 ohm per MOSFET as the drain resistor between gate to source.

Since I use a gate drive transformer, I also put a zener diode between gate and source but I don't think you need it for your IC.

What is the coil that your are switching for?
 

ronv

Joined Nov 12, 2008
3,770
Hmm. Well here is the simulation I ran. It is not real good since I don't have your exact FET model so I made one.
Here are some of the things I see:
The FETs are pretty slow to turn on and off because the driver can't drive to much current. (1.4usec.) This causes the power dissipation to be quite a bit higher than you might think it is. (60 watts). It's not clear to me what the FETs will think about this short high power pulse. Maybe someone else can better interpret the SOA.
The last is the high dv/dt of the top fet turning on almost turns the bottom FET on due to drain to gate capacitance. (This may be my model).
The only other thing I can think of is the body diode is kind of slow so it might benefit from some fast clamp diodes.

Did the FETs blow, or only the driver??

Hope this helps
 

Attachments

Thread Starter

tatsuki20

Joined Jun 22, 2013
6
I'm sorry that it took me a while before I can reply. I've realized the problems. In the past few days, I thought that there might be reverse current at the HO signal at the very first transient time, and therefore added a diode (HER107). However, adding a diode made the down curve of the pulse signal worse, the tail was more significant and it could be the reason for blowing up the MOSFET. After trying to modify many times, I realized that, ironically, the problem lay in the inrush current. The inrush current protection circuit that I had created did not work properly, it allowed the full current too soon before the current became saturated, hence, this (might) led to overlarge current going through the Vs and destroyed the IC. Here is the input of the transformer (or the output of the half bridge circuit) with the scale is 1/8

Thank all of you for helping me :) :p
 

Attachments

Top