interpolation linear in vhdl.

Thread Starter

charko

Joined Apr 27, 2010
11
Hi everybody!
I want to write the vhdl code for the interpolator 12bit and the algorithm of interpolator is : f = ya + lamda x (yb - ya).
I had write and simulate the code vhdl for adder 12 bit, multiplier 12bit, soustractor 12 bit and everything is ok.
I want to use these architecture to have interpolator 12 bit.
But if i want to have an interpolator 12 bit how size can be the imput signal( ya, lamba and yb)??
If i choose 12 bit for my input signal when i multiply lamda by (yb -ya) i should have 24 bit but i want to have an interpolator 12bit.

I hope that make clarify my problem.
I will be gratify for your help.

Charko

PS: Sorry for my bad english!!
 

Thread Starter

charko

Joined Apr 27, 2010
11
Hi everybody!
I think my problem is not a problem because i have believed if i want to have an intepolator 12 bit, the result for this interpolator should be 12 bit . But it 's not that!
Only the data input should be in 12 bit!

I think that !
Charko
 
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