Think about it. What is the logic level at the moment power is applied or disconnected?

It would depends if the output had pull up or down down resistors , if they didn't have any pull up or pull down resistors

It could be any state , a logic low or a logic high

well designed logic controls have a power on reset function which inhibits any signal changes taking place for a fixed period to allow logic states to stabilise on power on.

Yes it has this

But the CD4017, is a timer , so when you turned the power ON, the output of the CD4017 was outputing a Logic High state for 60seconds

 

It would depends if the output had pull up or down down resistors , if they didn't have any pull up or pull down resistors

It could be any state , a logic low or a logic high




Yes it has this

But the CD4017, is a timer , so when you turned the power ON, the output of the CD4017 was outputing a Logic High state for 60seconds

Last time I looked is was a decade counter! sometimes called a johnson decade counter, a timer it is NOT

 

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It could be any state , a logic low or a logic high

This is your clue, and the thinking from you I've been waiting for. The logic is indeterminate until the power rails settle down, and even this remains indeterminate until reset is activated, if there is one. So, you have indeterminate logic that is "finding" it's level, and that's why giltching occurs. The logic needs time to settle down.

But the CD4017, is a timer , so when you turned the power ON, the output of the CD4017 was outputing a Logic High state for 60 seconds.

Can you show me this in the product literature? Without looking, I guarantee this is not the case.

 

The logic is indeterminate until the power rails settle down, and even this remains indeterminate until reset is activated, if there is one. So, you have indeterminate logic that is "finding" it's level, and that's why giltching occurs. The logic needs time to settle down.

So how do you prevent glitching when powering up or down? what does the Logic IC chips need? pull up resistors, pull down resistor? a longer reset time?

 

So how do you prevent glitching when powering up or down?

You don't. You design your circuits to have a reset activity after power settles.

what does the Logic IC chips need? pull up resistors, pull down resistor? a longer reset time?

Those all help. Reset in absolutely a necessity if you have any flip-flops, registers or any other memory elements.

 

Logic IC chips don't go bad with aging.

The design is flawed.

But solder joints and connectors can, and also other passive components. I have car that in 1989 was one of the most advanced car of its time. With a lot of electronic for its time. Now and then this electronic like to play funny tricks. Like open the sunroof without problem but somehow refusing to close it then it starts rain 15 minutes later.

 

One more thing. You could have excessive glitching on power up, but that would mean you either have a poorly designed circuit, or a poorly starting power supply. If you think you have excessive giltching, check your power rails on power up. Again, you'll need a good storage oscilloscope to do this.

 

poorly starting power supply. If you think you have excessive giltching, check your power rails on power up. Again, you'll need a good storage oscilloscope to do this.

What u mean by poorly starting power supply?

How do you measure the TIME PERIOD it takes for the power supply to start up?

excessive giltching, check your power rails on power up.

If you have glitching on the power rails, what does this do to LOGIC IC chips? it makes Logic IC chips output glitching and false triggering? but why?

Doesn't Decoupling caps on the power rails take away the glitching?

 

What u mean by poorly starting power supply?

A power supply which doesn't start cleanly. It is unstable for a long time.

How do you measure the TIME PERIOD it takes for the power supply to start up?

Use an oscilloscope, as I already said.

If you have glitching on the power rails, what does this do to LOGIC IC chips? it makes Logic IC chips output glitching and false triggering? but why?

This has been covered. I'm not going over it again. Please read your thread an give it some thought before repeating your questions over and over and over....

Doesn't Decoupling caps on the power rails take away the glitching?

They help but don't eliminate it on startup.

 

A power supply which doesn't start cleanly. It is unstable for a long time.

Any reason why? because of the Time constant of the Filter capacitors?

Quote:
How do you measure the TIME PERIOD it takes for the power supply to start up?
Use an oscilloscope, as I already said.

Yes i know , but do i use the O-scopes trigger external input to hook it up to be referenced to the MAIN AC LINE

Tell me what channel#1 is going to go in the power supply?
Where does channel#1 going to go in the power supply?
Where is the O-scope External Trigger input going to go in the power supply?

Cause I want to measure the TIME PERIOD it takes for the power supply to start up

 

Doesn't Decoupling caps on the power rails take away the glitching?
They help but don't eliminate it on startup.

What eliminates the glitching during powers supply startup?

 

What eliminates the glitching during powers supply startup?

Nothing. .. ..

 

A power supply which doesn't start cleanly. It is unstable for a long time.
Any reason why? because of the Time constant of the Filter capacitors?

Quote:
Quote:
How do you measure the TIME PERIOD it takes for the power supply to start up?
Use an oscilloscope, as I already said.
Yes i know , but do i use the O-scopes trigger external input to hook it up to be referenced to the MAIN AC LINE

Tell me what channel#1 is going to go in the power supply?
Where does channel#1 going to go in the power supply?
Where is the O-scope External Trigger input going to go in the power supply?

Cause I want to measure the TIME PERIOD it takes for the power supply to start up

 

Tell me what channel#1 is going to go in the power supply?
Where does channel#1 going to go in the power supply?
Where is the O-scope External Trigger input going to go in the power supply?

Cause I want to measure the TIME PERIOD it takes for the power supply to start up

You're going to have to get some training on how to use an oscilloscope. I can't provide training for you.

And even if you come back and try to tell me you know how to use an oscilloscope, you don't. You don't know and you need to learn, and I can't teach you. This is my last post on this tread. Good luck!

 

Well others read this read to learn from also , not just me so remember that sir

 

Ok THIS is my last post. Electro-Tech Online has an interactive "chat room" where people might be able to walk you though how to use a scope. This is the wrong format for that type of training, and other who read it will not get anything from any attempt to do so.

 

No you're wrong, you're the wrong member for me to be talking to period

Go find someone else to talk to with your negative commits please

There is other members that are willing to teach , keep on subject and don't degrade me or other members

Have a nice day sir and stay out of threads from now on please