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Interfacing 5V ADC to 3.3V FPGA

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Thread Starter

patheticz

Joined Nov 3, 2009
28
I am currently conecting an ADC which has an output of 5V for logic high.
However, the FPGA can only take in a voltage of 3.3V.
I tried using a 74LS126A chip, which is a quad 3-state buffer. When Vcc connected to 5V, a logic high gives a output voltage of 3.6-3.7V, which is still beyond the limit of what a FPGA can take.

Are there any other recommendations to solve this problem with minimal power loss preferably?
 
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