Trying to find Acl (closed-loop gains) [Vout/Vin] of the following design. It's an ideal Op Amp. I put in a 1V source (Vin) to test the circuit.



The simulation is basically saying that Acl (Vout/Vin) = 4

Here's the calculations I did:

I1 = (Vin - V / 1k)
KCL @ Node V+ --> I1 - I2 = 0 --> I1 - (V-V/2k) = 0 --> I1 = 0
Therefore, Vin - V = 0 --> Vin = V

So both V nodes (since it is an ideal op amp) = Vin.

Then, I said I2 = I3 + I4
(Vin - V2)/3k = (V2 - Vout)/36k + (V2/12k)
After some correct algebra...
Vo = 12Vin + 16V2

So I need a voltage substitution for V2. I tried using a voltage divider to determine Vout...

Vout = V2* (2k / (36k+2k))
This turned out to be...
V2 = 19*Vout

I substituted that in, and the answer of Vout/Vin is way off (0.03...something). It should be 4.

Can you hint me where to go or what analysis technique to use?

I don't believe the voltage divider formula may be right. I can't do KCL at the Vout node because there is an Output current sinking into the Op Amp (Ro = 0 under ideal conditions). I thought of using a current divider of some sort, but it uses repetitive variables and equates to 0. HELP!!!

 

I would look at it like this:
1. No current flows through R2, since it has no voltage across it. Remove R2.
2. Since op amp input currents are zero, there is no voltage drop across R1 and R3. Short them out.
3. There are 3 resistors remaining. R6 is a load resistor, and doesn't enter into the gain equation.
4. R4 and R5 form a simple voltage divider. Vout=4*V2. Since V2=Vin, Gain=4.

 

Wow thanks. Your #2 point pretty much summed it up. ROFL, I should have redrawn the circuit. Even if there was a current flowing through the 3K resistor, it would have to go somewhere. Obviously, if it can't go into the op amp input, and it can't go anywhere else, there can't be current flow. THANKS!!!

Damn, we need a rep system! Positive reps for all.

 

Another good circuit to figure out the long, hard way and put up on my site.