Are you certain that multi-master operation is possible? How do they arbitrate for access to the bus?Slaves are easy to identify on the I2C bus as each slave device has a unique address that can be easily identified.
How do we identify the master device when there are two or more master devices on I2C a bus ?
They read back the data on SDA and if it doesn't agree with what was transmitted, then arbitration is lost.Are you certain that multi-master operation is possible? How do they arbitrate for access to the bus?
The reason I ask is because I have never seen it in the wild.
OK. Makes sense, just never had a need to consider it.They read back the data on SDA and if it doesn't agree with what was transmitted, then arbitration is lost.
The I2C master cannot send a logic high, it has to rely upon the pullup resistor.
https://www.i2c-bus.org/i2c-primer/clock-generation-stretching-arbitration/
It follows that the one trying to output the lowest numbered slave address will win (much like CAN)
I've not tried it either!OK. Makes sense, just never had a need to consider it.
yes it is possible but how it works i just want to understand.Are you certain that multi-master operation is possible?
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