hi
i am a Electronic student and our master wanted a three stage ampilifire with BJT transistor with this specification:
Av at least 100
input Impedance at least 10k ohm
output resistance maximum 1k ohm
i dont know what to do i designed a 2 stage ampilifire before but i cant handle a 3 stage one. i need a help immediately please please please...
this project has 75% of my final mark and i am totaly confused.....

 

We all need help...
Please post a more descriptive title.

 

http://www.lmgtfy.com/?q=3+stage+bjt+amplifier

 

...i designed a 2 stage ampilifire before but i cant handle a 3 stage one...

Perhaps you can provide a bit more detail about what is confusing you. The concepts - whether 2-stage or 3 - are the same. If you understood what you were doing for a 2-stage design, there should be no big leap to 3-stage.

 

sir i send u 2 pictures from my circuit the first one is project schematic and the second one is the answer of it. but in stage two i have attenuation instead of amplification and in stage 3 i dont have a good answer i think transistor 3 goes to saturation what can i do to fix it i want to have good gain but i cant!!!!!!!
i am sorry if my english is not good....

 

It is very hard to read your diagram, for the lettering is very small relative to the resolution. Having said that, you seem to have made your base bias dividers all 100kΩ + 100kΩ: that is unlikely to work.

Why do you not design the bias circuits properly? These values look like guesses. Conventional design sets the emitter voltage to a modest fraction of the supply, and sets the collector voltage about half-way between the emitter voltage and the supply. The arithmetic required for this is a bit tedious, but not very difficult.

 

sir thank you for replying my request
here i changed some resistor and capacitors i send a better picture again can you tell me is that a good 3 stage ampilifire for design?
i have gain Av=800 and Low cut off frequency=1.5Hz and High cut off frequency=1.8MHz
best regards....

 

First we have the base divider voltage too high. Now it is set to almost exactly the expected Vbe, so the working point will be terribly sensitive to the supply voltage. This is not satisfactory,

Perhaps about 1V across each emitter resistor might be more reasonable. If high gain is required, all or part of the emitter resistors may need to be bypassed with a capacitor. You should review your notes or study texts on the subject.

http://en.wikipedia.org/wiki/Bipolar_transistor_biasing#Voltage_divider_biasing

 

dear sir
as i mentioned in title i want at least 10kΩ Impedance in input (Rin>=10kΩ) and maximum 1kΩ output resistance (Ro<=1kΩ) what can i do to have this condition in my circuit. do i have to raise the baias dividers resistor or raise emitter resistor???? if i do this in which stage????? thanks

 

Try to use the input and output impedance requirements to define certain elements of the first and last stages.

A minimum gain of 100 with input impedance at least 10kΩ and output impedance less than 1kΩ should be easy to meet with three stages. Are there other constraints that need to be met, for instance on bandwidth, output level, or power consumption?