hi, im learing about timing diagram with propagation delay but im having a hard time understand how to draw a timing diagram from expression/logic gates.
Here is a example:
F = A + (B*C), so A is OR with (B AND C). each gate having delay of 5 NS.How do i come up with a timing diagram for this? do i first make a truth table??? i mean where should i first start to tackle problem like this? thank
Here is a example:
F = A + (B*C), so A is OR with (B AND C). each gate having delay of 5 NS.How do i come up with a timing diagram for this? do i first make a truth table??? i mean where should i first start to tackle problem like this? thank