How to divide the clock frequency by 16?
- Thread starter gima
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An easy way is to feed the clock through 4 D-type flip flops in sequence. The clock is attached to the clock on all FFs. The output of the 1st FF is fed back through an inverter to the data-in of 1st FF, and to the data-in on the 2nd FF. The output of the 2nd FF is connected to the data-in of the 3rd FF, and the 3rd FF output is connected to the data-in of the 4th FF. The output of the 4th FF will be the clock / 16.
Or, if you want something that actually works, you could take the four D flip flops and configre each as a T-FF (toggle flip flop) by connecting the inverted output back to the data input. You then apply your clock to the clock of the first stage. You apply the output of each stage to the clock input of the next stage.
This is an asynchronous design and will work as long as this is the only thing your original clock is used for (or, more to the point, if the circuitry driven by the output clock of this circuit never interacts with circuitry that is driven by the original clock).
The circuit that LDC3 describes will only divide the clock by two. The last three stages are merely acting as a shift register.
This is an asynchronous design and will work as long as this is the only thing your original clock is used for (or, more to the point, if the circuitry driven by the output clock of this circuit never interacts with circuitry that is driven by the original clock).
The circuit that LDC3 describes will only divide the clock by two. The last three stages are merely acting as a shift register.
You're right. I wonder why I didn't see that.
Don't worry. I spotted it right away, but had to check it twice and ask three ways if my conclusion made sense before I was confident enough to point it out.You're right. I wonder why I didn't see that.
Excellent option, each output pin on the CD4040 provides a different divide by \(2^{n}\) down to n=14. A single chip solution.
