how to design parallel j k flip-flop counter 0-9

beenthere

Joined Apr 20, 2004
15,819
Can you be more specific? A logic arrangement that takes data in parallel is a register. A counter indicates events that occur in a sequence. Have you looked at the data sheet for an existing counter (if that is what you want) like a 7490? That is a BCD counter.
 

Thread Starter

mohsen

Joined Oct 24, 2008
37
Well he asked us to do jk flip flop connected in series and do another on connected in parallel. That count from 0-9 and I have done the series one but I don't know how to do the parallel one.
 

Thread Starter

mohsen

Joined Oct 24, 2008
37
no, he want us to design parallel and series counter from 0-9 buy using j k flip-flop
as i said i have done the series counter need help in the parallel counter.
any ideas
 

Ron H

Joined Apr 14, 2005
7,063
no, he want us to design parallel and series counter from 0-9 buy using j k flip-flop
as i said i have done the series counter need help in the parallel counter.
any ideas
Here is one definition of a parallel counter.
An (n, m) parallel counter is a circuit with n inputs that produces an m-bit binary count of the number of its inputs that are ONEs.
Unfortunately, you have to pay EUR 34.00 to read the entire article.

I don't see why a parallel counter (with this definition) would need flip-flops. It seems to me that it would be combinational logic. There may be other definitions for parallel counter. As beenthere suggested, I believe that parallel-load counters are sometimes called parallel counters.
 
Top