how r/f time effects on EMC in IC's design in PCB?

Discussion in 'General Electronics Chat' started by knrdeepak, Jun 12, 2009.

  1. knrdeepak

    Thread Starter New Member

    May 21, 2009
    hello guys.. im new to this blog,

    Please give me the information on relation between rise time, fall time in signal spectra(IC's on PCB) with EMI and RFI.

    how could effect r/f times to EMC of IC's in PCB design?

    I will be thankfull if any1 upload this here..
  2. R!f@@

    AAC Fanatic!

    Apr 2, 2009
    Rise time and fall time effects only in high frequancies, were PCB tracks introduce stray capacitance.
    In lower frequencies this is not much of a problem.
    It counts when you want high speed digital's
    You have to be more specific.


  3. knrdeepak

    Thread Starter New Member

    May 21, 2009
    Thanks for your reply...
    could you please explain how these High frequency(more than 1gb processors) can introduce stray capacitance and indirectly to there any theory(or formula) behind it to understand above scenario...Please giv a reply...
  4. mik3

    Senior Member

    Feb 4, 2008
    Any pair of conductors separated by a dielectric forms a capacitor. On PCB the tracks are separated by the insulating material of the PCB and air. This caused stray capacitance which cause problems in high frequency systems if they are not designed properly.

    It is hard to analyze this stray capacitance and there is not a standard formula to calculate it.

    You can study transmission lines theory if you want to learn more about it.

    Note that there is also stray inductance in the circuits.