Ive read that G=Rc/Re
I would imagine the formula originated by dividing voltage peak of output signal by voltage peak of input signal.

But can anyone explain how it is done?

And also if we had an input signal of peak 1v and VCC of 12V...we cant possibly have a gain of more than 12
Yet Rc/Re could be adjusted to give us a gain of 1000 if we wanted? ex. rc=10000ohm re=10...How is this possible?

 

Ive read that G=Rc/Re
I would imagine the formula originated by dividing voltage peak of output signal by voltage peak of input signal.

But can anyone explain how it is done?

And also if we had an input signal of peak 1v and VCC of 12V...we cant possibly have a gain of more than 12
Yet Rc/Re could be adjusted to give us a gain of 1000 if we wanted? ex. rc=10000ohm re=10...How is this possible?

The current going through Rc is about the same as that going through Re. The voltage developed across Rc is I*Rc and the voltage developed across Re is I*Re. So if we take voltage as I*R then at the collector we have I*Rc and at the emitter we have I*Re. The voltage gain is therefore I*Rc/I*Re and by cancelling the common term I, we get a gain of Rc/Re.

As for the second question, the gain of 1000 is only possible if the input is 1000 times smaller than the maximum output signal. Otherwise we get clipping.
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Thank you PRS, i didn't realise that since Re is common to the input signal as well the voltage dropped across re (ie*re) is actually going to calculate for the input signal.

And the second answer was clear as well.
thank you

 

Sorry i don't want to be a nuisance but i have one more question if someone on this board could help?
Assuming that my supply is 1000 times larger than the input signal of my amplifier, why is it preferable to use two cascaded amplifiers instead of using one to achieve maximum gain?

 

Is this for transistors only, or amplifiers in general? Op-Amps can have very large gains without a problem. A single transistor can do quite a bit, but are limited by their Hfe, which can be forced, but performance suffers when outside it's parameters.

 

Yes i'm talking about discrete transistor amplifiers, why divide the gain up between two stages when we design a single stage for maximum gain?

say were talking about an unloaded voltage divider amplifier like so

If our input signal is 1000 times smaller than our source VCC and gain=Rc/re why dont we just design for Rc to be 10 000Ω and Re to be 10Ω

 

If you calculate the values for such an amplifer, you will find that the input and output impedances will be unrealistic, and even some of the component calculations.

Other reasons for using 2 transistors, is one for boosting the voltage, one for current/impedance matching with little or no gain.

 

Ive read that G=Rc/Re
I would imagine the formula originated by dividing voltage peak of output signal by voltage peak of input signal.

But can anyone explain how it is done?

And also if we had an input signal of peak 1v and VCC of 12V...we cant possibly have a gain of more than 12
Yet Rc/Re could be adjusted to give us a gain of 1000 if we wanted? ex. rc=10000ohm re=10...How is this possible?

Hi all, I am a new member of forum. Would a newcomer be warmly welcome here? Good day you guys!!!

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Two gain stages will allow higher bandwidth for a given gain. Distortion should also be lower (I think).

 

The most voltage gain from a single transistor amplifier that is driven from a low impedance and has a high impedance load is about 220. At high levels its distortion is 40% or more. Its bandwidth is narrow.

Two transistor amplifiers each with a voltage gain of only 32 (total gain is 1024) have low distortion and a wider bandwidth.

 

thatoneguy, Ive just realized what you were saying,i forgot to consider my transistor's actual parameters, the hfe.
I guess i shouldn't set the gain of a single stage beyond the minimum hfe rating.
Audioguru,Ron H thanks, i have just started reading into bandwidth limitations

 

hfe is AC current gain that has nothing to do with the voltage gain of a transistor circuit.
The voltage gain is the collector resistor (and the load in parallel with it) divided by the unbypassed emitter resistor in series with the internal emitter resistance of the transistor.

If there is no external emitter resistor, the supply voltage is high so that the value of the collector resistor can be high and the load resistance is high then the voltage gain is a max of about 220.

 

Where does the number 220 come from?
lets assume their is no external Re for maximum gain
Av=Rc||RL / (26mv/ie)

so if rc and rl are both individually=4kΩ
then in parallel they are 2kΩ
Av=2kΩ/(26mv/ie)

why cant our gain be in the range of say 1000 for a single stage?

 

Look here at post 34, 35
http://forum.allaboutcircuits.com/showthread.php?p=170792#post170792

 

Now this i understand perfectly
http://www.crbond.com/papers/ent21.pdf
-the math was easy to follow
thanks jony!

 

You don't want to bias a transistor near saturation but instead you want it biased so that the output can swing its maximum. Then the max gain with a reasonable supply voltage and a very high impedance load is 220.

 

You don't want to bias a transistor near saturation but instead you want it biased so that the output can swing its maximum.

Yes i know i should set up rc for midpoint bias

Then the max gain with a reasonable supply voltage and a very high impedance load is 220.

Again i dont understand where the number 220 comes from?

 

You don't want to bias a transistor near saturation but instead you want it biased so that the output can swing its maximum. Then the max gain with a reasonable supply voltage and a very high impedance load is 220.

It's not necessary to have a very high impedance load to get a high voltage gain.

If there is no external emitter resistor (and we know that stability will not be good, and distortion will be high) then biasing so that the collector voltage is about Vcc/2 will give a voltage gain of around 20*Vcc when driven by a voltage source, no matter what value Rc is (within reasonable limits, of course; the collector current must be less than the allowable maximum).

A low output impedance with high voltage gain can be obtained by making the emitter current large, which makes the transconductance large.

With a Vcc of 12 volts, we can get a voltage gain of 240. A Vcc of 50 volts can give a voltage gain of 1000.

 

Electrician, Shouldnt the gain at midpoint when Ie=(Vcc/2)/rc and gain at saturation Ie=Vcc/rc be uniform?
At saturation our gain is maxed at 38 and at midpoint our gain is around 19.2.

Is this the distortion issue audioguru was talking about- or am i just confused.

 

Electrician, Shouldnt the gain at midpoint when Ie=(Vcc/2)/rc and gain at saturation Ie=Vcc/rc be uniform?
At saturation our gain is maxed at 38 and at midpoint our gain is around 19.2.

Go read the .pdf again: http://www.crbond.com/papers/ent21.pdf

At saturation the voltage gain is 38*Vcc and at midpoint the voltage gain is around 19.2*Vcc.

I just round the numbers to 40 and to 20.

You'll notice that if Vcc is 12 volts, the voltage gain with midpoint biasing is 19.2*12 = 230.4. Perhaps this is the source of Audioguru's figure of 220. He did say "...with a reasonable Vcc..."; 12 volts could qualify as "reasonable".

Is this the distortion issue audioguru was talking about- or am i just confused.

The distortion issue arises when you get a lot of voltage gain from a single stage. I know Audioguru has posted a simulation showing the distortion at high voltage gain. Perhaps he can post a link to that simulation.