Don't worry, I'm not going to just give you the answer.

I'll try to teach you to figure out what's going on so you'll be able to troubleshoot other problems.

What is it that you don't understand about D flip flops?

I'm sure you will you're literally the best thank you thank you thank you X1,000,000 for your time, effort and patience!!! You have no idea how grateful I am. I have not added any "to" device, I will and when I do i'll post a screenshot, thanks again

 

Did you add some of the "To" devices and connect them to the nets you want to view?
View attachment 141902

Now I added a 'To' device and now everything looks like this:

 

Now I added a 'To' device and now everything looks like this:

Now you need to add "To" devices to the counter outputs of both counters and the clock for the first counter. And remove the short between the first stage counter reset to the second stage clock.

You also need to give them unique names.

 

Now you need to add "To" devices to the counter outputs of both counters and the clock for the first counter. And remove the short between the first stage counter reset to the second stage clock.

You also need to give them unique names.

Do I add 'To' devices to the 4 outputs of both counters? Or just to one output connection on both?

 

Do I add 'To' devices to the 4 outputs of both counters? Or just to one output connection on both?

What signals do you think you'll need to troubleshoot the erratic count problem?

 

What signals do you think you'll need to troubleshoot the erratic count problem?

R, C, and L maybe?

 

Here's what I understand:

on the 0-9 counter, when it resets, R = 0. When I want the 0-5 counter to hold, the values of L,C, and R should be 0, right? So it makes sense to connect a NOT gate to the 0-9 counter (to invert 1 to 0) and connect the output (0) to L and C outputs on the 0-5 counter

 

R, C, and L maybe?

Don't guess.

Think about it and try again.

 

on the 0-9 counter, when it resets, R = 0.

Is reset LOW active or HIGH active?

When I want the 0-5 counter to hold, the values of L,C, and R should be 0, right?

Explain the function of those inputs to me.

So it makes sense to connect a NOT gate to the 0-9 counter (to invert 1 to 0) and connect the output (0) to L and C outputs on the 0-5 counter

Connect a NOT gate to what? What would that do? We're trying to troubleshoot the erratic count problem.

Explain the function of L and C; BTW, they're not outputs.

 

Is reset LOW active or HIGH active?

Low active means the pin holds the value zero, right? (And high active means the pin equals 1 - that's what I understand at least)

Since R is activated when its value is 1, I would say it is HIGH active

Explain the function of those inputs to me.

L - load - loads input (i was just about to ask where from since my registers don't have any input connections to load from)

R - reset - starts over again (ex. when it reaches 9, it starts over from 0 when R = 1)

When C and U are 1, the register will count up.

When C is low (zero) the register will hold the present state. It also says when R, L, C are 0 it will hold.

 

Low active means the pin holds the value zero, right? (And high active means the pin equals 1 - that's what I understand at least)

LOW active means the input responds to a LOW logic level, or falling edge for edge triggered inputs.

Since R is activated when its value is 1, I would say it is HIGH active

Why did you say it was LOW active in post #50?

L - load - loads input (i was just about to ask where from since my registers don't have any input connections to load from)

That's my point. You're not using the load functionality, so why do you want to change it?

R - reset - starts over again (ex. when it reaches 9, it starts over from 0 when R = 1)

When C and U are 1, the register will count up.

When C is low (zero) the register will hold the present state. It also says when R, L, C are 0 it will hold.

Why do you want to change any of these inputs? Isn't the first counter working properly with them as connected?

 

LOW active means the input responds to a LOW logic level, or falling edge for edge triggered inputs.

Thank you for the info!

Why did you say it was LOW active in post #50?

I dont remember saying that

That's my point. You're not using the load functionality, so why do you want to change it?

Why do you want to change any of these inputs? Isn't the first counter working properly with them as connected?

Yeah you're right!!!

 

I connected the R pin on the 0-9 counter to the C pin on the 0-5 counter. The output is:
0-49
50
then starts over from 0-49

What type of counter are you studying? Ripple or synchronous?

 

What type of counter are you studying? Ripple or synchronous?

I think it's synchronuous

 

What type of counter are you studying? Ripple or synchronous?

it doesnt specify which one in write up they sent us so i'm not sure

 

it doesnt specify which one in write up they sent us so i'm not sure

You should do it the way you were being taught before this test.

You've created another short circuit. The simulator seems to be doing something to resolve the conflict.

 

You should do it the way you were being taught before this test.

The thing is I wasn't taught how to do this before, i'm just figuring things out as I go

You've created another short circuit. The simulator seems to be doing something to resolve the conflict.

Hmm... so I wasn't supposed to do that?

 

The thing is I wasn't taught how to do this before, i'm just figuring things out as I go

I find that difficult to believe. No one is born knowing how to do this.

Hmm... so I wasn't supposed to do that?

No. The simulator shouldn't let a gate pull the positive supply low, so the counter should always be enabled.

 

I find that difficult to believe. No one is born knowing how to do this..

Unfortunately, it is what it is. I wasn't even taught how to do any of this theoretically as a freshman or at least at the beginning of this semester

No. The simulator shouldn't let a gate pull the positive supply low, so the counter should always be enabled

but hey, it works!! I'm so happy! Now I just need to figure out how to make it (the 0-5 counter) hold 5 before resetting to zero (let's hope my instructor doesn't make it mandatory to use a D flipflop because the only D flipflops I know are dolce and gabbana flip flops)

 

I suggest you get clarification before proceeding.

Normally ripple counters are taught first so you'll be better able to recognize the benefits of synchronous designs.

Close only counts in horseshoes and hand grenades...

 

I have just been informed as long as my circuit is working just fine, i don’t have to use a flip flop

Did you ask if it was supposed to be a ripple counter (vs. synchronous)?

The logic for a ripple counter will be simpler than synchronous because those counters don't have a carry out signal to facilitate chaining synchronously.

Personally, I think you should go back to the design that was counting erradically, figure out what was wrong, and then connect the two counters.

In any case, you should get into the habit of posting schematics (preferrably of the well drawn variety) whenever you're discussing circuits.

The "^" connection you're referring is the clock input. Normally it's placed on the left side of the symbol and the ">" character is used.